bug#63251: 28.2; vhdl-mode contribution

bug#63251: 28.2; vhdl-mode contribution

[Cyril Arnould]

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Following bug#62508, I've taken a bit of a closer look at the compiler
regexp for ModelSim. I've modified it so that it can differentiate
between Errors, Warnings and Notes when highlighting. I also make use of
Xilinx Vivado at work, for which I've added a new compiler entry:


--- a/lisp/progmodes/vhdl-mode.el
+++ b/lisp/progmodes/vhdl-mode.el
@@ -286,7 +286,7 @@ vhdl-compiler-alist
     ;;    counter_rtl.vhd(29):Conditional signal assignment line__29
     ("ModelSim" "vcom" "-93 -work \\1" "make" "-f \\1"
      nil "vlib \\1; vmap \\2 \\1" "./" "work/" "Makefile" "modelsim"
-     ("^\\(ERROR\\|WARNING\\|\\*\\* Error\\|\\*\\* Warning\\)[^:]*:\\( *\\[[0-9]+]\\| ([^)]+)\\)? \\([^ \t\n]+\\)(\\([0-9]+\\)):" 3 4 nil)
+     ("^\\(?:\\(?1:ERROR\\|\\*\\* Error\\)\\|\\(?2:WARNING\\|\\*\\* Warning\\)\\|\\(?3:NOTE\\|\\*\\* Note\\)\\)[^:]*:\\( *\\[[0-9]+]\\| ([^)]+)\\)? \\(?4:[^ \t\n]+\\)(\\(?5:[0-9]+\\)):" 4 5 nil (2 . 3))
      ("" 0)
      ("\\1/_primary.dat" "\\2/\\1.dat" "\\1/_primary.dat"
       "\\1/_primary.dat" "\\1/body.dat" downcase))
@@ -385,6 +385,13 @@ vhdl-compiler-alist
      nil "mkdir \\1" "./" "work/" "Makefile" "xilinx"
      ("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil) ("" 0)
      nil)
+    ;; Xilinx Vivado:
+    ;; ERROR: [VRFC 10-1412] syntax error near o_idle [test.vhd:23]
+    ("Xilinx Vivado" "xvhdl" "" "make" "-f \\1"
+     nil "mkdir \\1" "./" "work" "Makefile" "vivado"
+     ("^\\(?:\\(?1:ERROR\\)\\|\\(?2:WARNING\\)\\|\\(?3:INFO\\)\\): \\(.+\\) \\[\\(?4:[^ \t\n]+\\):\\(?5:[0-9]+\\)\\]" 4 5 nil (2 . 3)) ("" 0)
+     ("\\1/entity" "\\2/\\1" "\\1/configuration"
+      "\\1/package" "\\1/body" downcase))
     )
   "List of available VHDL compilers and their properties.
Each list entry specifies the following items for a compiler:


The patch was generated from the emacs master branch. I would greatly
appreciate it if these changes could find their way in some form into a
future emacs release.

Cyril


In GNU Emacs 28.2 (build 2, x86_64-w64-mingw32)
of 2022-10-11 built on fv-az277-711
Repository revision: b35f9af313a5d5c42988eb5a7751209b4234a67e
Repository branch: master
Windowing system distributor 'Microsoft Corp.', version 10.0.19044
System Description: Microsoft Windows 10 Pro (v10.0.2009.19044.2846)

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bug#63251: 28.2; vhdl-mode contribution

[Eli Zaretskii]

> From: Cyril Arnould <cyril.arnould@outlook.com>
> Date: Wed, 3 May 2023 19:40:18 +0000
> 
> Following bug#62508, I've taken a bit of a closer look at the compiler
> regexp for ModelSim. I've modified it so that it can differentiate
> between Errors, Warnings and Notes when highlighting. I also make use of
> Xilinx Vivado at work, for which I've added a new compiler entry:
> 
> 
> --- a/lisp/progmodes/vhdl-mode.el
> +++ b/lisp/progmodes/vhdl-mode.el
> @@ -286,7 +286,7 @@ vhdl-compiler-alist
>      ;;    counter_rtl.vhd(29):Conditional signal assignment line__29
>      ("ModelSim" "vcom" "-93 -work \\1" "make" "-f \\1"
>       nil "vlib \\1; vmap \\2 \\1" "./" "work/" "Makefile" "modelsim"
> -     ("^\\(ERROR\\|WARNING\\|\\*\\* Error\\|\\*\\* Warning\\)[^:]*:\\( *\\[[0-9]+]\\| ([^)]+)\\)? \\([^ \t\n]+\\)(\\([0-9]+\\)):" 3 4 nil)
> +     ("^\\(?:\\(?1:ERROR\\|\\*\\* Error\\)\\|\\(?2:WARNING\\|\\*\\* Warning\\)\\|\\(?3:NOTE\\|\\*\\* Note\\)\\)[^:]*:\\( *\\[[0-9]+]\\| ([^)]+)\\)? \\(?4:[^ \t\n]+\\)(\\(?5:[0-9]+\\)):" 4 5 nil (2 . 3))
>       ("" 0)
>       ("\\1/_primary.dat" "\\2/\\1.dat" "\\1/_primary.dat"
>        "\\1/_primary.dat" "\\1/body.dat" downcase))
> @@ -385,6 +385,13 @@ vhdl-compiler-alist
>       nil "mkdir \\1" "./" "work/" "Makefile" "xilinx"
>       ("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil) ("" 0)
>       nil)
> +    ;; Xilinx Vivado:
> +    ;; ERROR: [VRFC 10-1412] syntax error near o_idle [test.vhd:23]
> +    ("Xilinx Vivado" "xvhdl" "" "make" "-f \\1"
> +     nil "mkdir \\1" "./" "work" "Makefile" "vivado"
> +     ("^\\(?:\\(?1:ERROR\\)\\|\\(?2:WARNING\\)\\|\\(?3:INFO\\)\\): \\(.+\\) \\[\\(?4:[^ \t\n]+\\):\\(?5:[0-9]+\\)\\]" 4 5 nil (2 . 3)) ("" 0)
> +     ("\\1/entity" "\\2/\\1" "\\1/configuration"
> +      "\\1/package" "\\1/body" downcase))
>      )
>    "List of available VHDL compilers and their properties.
> Each list entry specifies the following items for a compiler:
> 
> 
> The patch was generated from the emacs master branch. I would greatly
> appreciate it if these changes could find their way in some form into a
> future emacs release.

Reto, any comments on these changes?

Thanks.

bug#63251: 28.2; vhdl-mode contribution

[Reto Zimmermann]

On 2023-05-04 07:16, Eli Zaretskii wrote:
>> From: Cyril Arnould <cyril.arnould@outlook.com>
>> Date: Wed, 3 May 2023 19:40:18 +0000
>>
>> Following bug#62508, I've taken a bit of a closer look at the compiler
>> regexp for ModelSim. I've modified it so that it can differentiate
>> between Errors, Warnings and Notes when highlighting. I also make use of
>> Xilinx Vivado at work, for which I've added a new compiler entry:
>>
>>
>> --- a/lisp/progmodes/vhdl-mode.el
>> +++ b/lisp/progmodes/vhdl-mode.el
>> @@ -286,7 +286,7 @@ vhdl-compiler-alist
>>       ;;    counter_rtl.vhd(29):Conditional signal assignment line__29
>>       ("ModelSim" "vcom" "-93 -work \\1" "make" "-f \\1"
>>        nil "vlib \\1; vmap \\2 \\1" "./" "work/" "Makefile" "modelsim"
>> -     ("^\\(ERROR\\|WARNING\\|\\*\\* Error\\|\\*\\* Warning\\)[^:]*:\\( *\\[[0-9]+]\\| ([^)]+)\\)? \\([^ \t\n]+\\)(\\([0-9]+\\)):" 3 4 nil)
>> +     ("^\\(?:\\(?1:ERROR\\|\\*\\* Error\\)\\|\\(?2:WARNING\\|\\*\\* Warning\\)\\|\\(?3:NOTE\\|\\*\\* Note\\)\\)[^:]*:\\( *\\[[0-9]+]\\| ([^)]+)\\)? \\(?4:[^ \t\n]+\\)(\\(?5:[0-9]+\\)):" 4 5 nil (2 . 3))
>>        ("" 0)
>>        ("\\1/_primary.dat" "\\2/\\1.dat" "\\1/_primary.dat"
>>         "\\1/_primary.dat" "\\1/body.dat" downcase))
>> @@ -385,6 +385,13 @@ vhdl-compiler-alist
>>        nil "mkdir \\1" "./" "work/" "Makefile" "xilinx"
>>        ("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil) ("" 0)
>>        nil)
>> +    ;; Xilinx Vivado:
>> +    ;; ERROR: [VRFC 10-1412] syntax error near o_idle [test.vhd:23]
>> +    ("Xilinx Vivado" "xvhdl" "" "make" "-f \\1"
>> +     nil "mkdir \\1" "./" "work" "Makefile" "vivado"
>> +     ("^\\(?:\\(?1:ERROR\\)\\|\\(?2:WARNING\\)\\|\\(?3:INFO\\)\\): \\(.+\\) \\[\\(?4:[^ \t\n]+\\):\\(?5:[0-9]+\\)\\]" 4 5 nil (2 . 3)) ("" 0)
>> +     ("\\1/entity" "\\2/\\1" "\\1/configuration"
>> +      "\\1/package" "\\1/body" downcase))
>>       )
>>     "List of available VHDL compilers and their properties.
>> Each list entry specifies the following items for a compiler:
>>
>>
>> The patch was generated from the emacs master branch. I would greatly
>> appreciate it if these changes could find their way in some form into a
>> future emacs release.
> Reto, any comments on these changes?
>
> Thanks.
The changes look good to me.

Thanks,
Reto

bug#63251: 28.2; vhdl-mode contribution

[Eli Zaretskii]

> Date: Thu, 4 May 2023 15:56:42 +0200
> Cc: 63251@debbugs.gnu.org
> From: Reto Zimmermann <reto@gnu.org>
> 
> > Reto, any comments on these changes?
> >
> > Thanks.
> The changes look good to me.

Thanks, installed on the emacs-29 branch, and closing.

bug#63251: 28.2; vhdl-mode contribution

[Mattias Engdegård]

> Following bug#62508, I've taken a bit of a closer look at the compiler
> regexp for ModelSim. I've modified it so that it can differentiate
> between Errors, Warnings and Notes when highlighting. I also make use of
> Xilinx Vivado at work, for which I've added a new compiler entry:

Sorry, but computer says no. The modified vhdl-compiler-alist value does not match its declared type.

You can easily check this by running `M-x customize-variable vhdl-compiler-alist`; it will show the contents as a single big text field and say (mismatch).
If the value matches the type, it would have shown the value structurally.

Another check is to run `make -C test test-custom-opts`, which checks the values of all defcustom variables in Emacs.

In this case it seems to be the `(2 . 3)` values at the end of the error message sublists. Remove them and the value matches the type.
If those (2 . 3) are important, perhaps you want to change the type instead but you would have to maintain compatibility somehow. I see there is a lot of code dealing with changes to the type of that variable in vhdl-mode.el.

bug#63251: AW: bug#63251: 28.2; vhdl-mode contribution

[Cyril Arnould]

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Forgot to hit «Reply to all»

Oh, did not realize that. Yes, the (2 . 3) is important, it’s the
TYPE that determines whether the message is highlighted as an
INFO, WARNING or ERROR. From compilation-error-regexp-alist:

Each elt has the form (REGEXP FILE [LINE COLUMN TYPE HYPERLINK
HIGHLIGHT...]).

TYPE is 2 or nil for a real error or 1 for warning or 0 for info.
TYPE can also be of the form (WARNING . INFO).  In that case this
will be equivalent to 1 if the WARNING’th subexpression matched
or else equivalent to 0 if the INFO’th subexpression matched,
or else equivalent to 2 if neither of them matched.
See ‘compilation-error-face’, ‘compilation-warning-face’,
‘compilation-info-face’ and ‘compilation-skip-threshold’.

I’ll try to take a look into modifying the type of the
vhdl-compiler-alist.


Von: Mattias Engdegård<mailto:mattias.engdegard@gmail.com>
Gesendet: Samstag, 6. Mai 2023 11:22
An: 63251@debbugs.gnu.org<mailto:63251@debbugs.gnu.org>
Cc: Reto Zimmermann<mailto:reto@gnu.org>; Eli Zaretskii<mailto:eliz@gnu.org>; Cyril Arnould<mailto:cyril.arnould@outlook.com>
Betreff: bug#63251: 28.2; vhdl-mode contribution

> Following bug#62508, I've taken a bit of a closer look at the compiler
> regexp for ModelSim. I've modified it so that it can differentiate
> between Errors, Warnings and Notes when highlighting. I also make use of
> Xilinx Vivado at work, for which I've added a new compiler entry:

Sorry, but computer says no. The modified vhdl-compiler-alist value does not match its declared type.

You can easily check this by running `M-x customize-variable vhdl-compiler-alist`; it will show the contents as a single big text field and say (mismatch).
If the value matches the type, it would have shown the value structurally.

Another check is to run `make -C test test-custom-opts`, which checks the values of all defcustom variables in Emacs.

In this case it seems to be the `(2 . 3)` values at the end of the error message sublists. Remove them and the value matches the type.
If those (2 . 3) are important, perhaps you want to change the type instead but you would have to maintain compatibility somehow. I see there is a lot of code dealing with changes to the type of that variable in vhdl-mode.el.





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bug#63251: AW: bug#63251: 28.2; vhdl-mode contribution

[Cyril Arnould]

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Ok, I hope the attached patch takes care of things. This time
it's based on the emacs-29 branch.

- I've updated the docstring with a description of the TYPE,
  pretty much copied from compile.el. Feel free to change it of
  course.

- I've added TYPE to the vhdl-compiler definition with the
  appropriate choices for Info/Warning/Error and the dotted
  pair. I'm not sure if sexp was the correct choice for the
  dotted pair, is there a better alternative? At any rate, it
  seems to work.

- All other compiler entries now have TYPE nil, i.e. an error.

- I added another entry to the backwards compatibility code, all
  it took was a slight modification of the entry before
  that. I've tested it by saving a custom vhdl-compiler-alist and
  then updating the vhdl-mode.el, it automatically inserted nil
  into the customization without touching the other values.

- Unrelated to the changes above, I've also updated the Xilinx
  Vivado compiler entry's library directory, I got an error
  message that it must end with '/'.

Since this introduces changes in the vhdl-compiler type, I guess
it would be appropriate to increment the vhdl-version number?


Von: Cyril Arnould<mailto:cyril.arnould@outlook.com>
Gesendet: Samstag, 6. Mai 2023 14:53
An: Mattias Engdegård<mailto:mattias.engdegard@gmail.com>; 63251@debbugs.gnu.org<mailto:63251@debbugs.gnu.org>
Cc: Reto Zimmermann<mailto:reto@gnu.org>; Eli Zaretskii<mailto:eliz@gnu.org>
Betreff: AW: bug#63251: 28.2; vhdl-mode contribution

Forgot to hit «Reply to all»

Oh, did not realize that. Yes, the (2 . 3) is important, it’s the
TYPE that determines whether the message is highlighted as an
INFO, WARNING or ERROR. From compilation-error-regexp-alist:

Each elt has the form (REGEXP FILE [LINE COLUMN TYPE HYPERLINK
HIGHLIGHT...]).

TYPE is 2 or nil for a real error or 1 for warning or 0 for info.
TYPE can also be of the form (WARNING . INFO).  In that case this
will be equivalent to 1 if the WARNING’th subexpression matched
or else equivalent to 0 if the INFO’th subexpression matched,
or else equivalent to 2 if neither of them matched.
See ‘compilation-error-face’, ‘compilation-warning-face’,
‘compilation-info-face’ and ‘compilation-skip-threshold’.

I’ll try to take a look into modifying the type of the
vhdl-compiler-alist.


Von: Mattias Engdegård<mailto:mattias.engdegard@gmail.com>
Gesendet: Samstag, 6. Mai 2023 11:22
An: 63251@debbugs.gnu.org<mailto:63251@debbugs.gnu.org>
Cc: Reto Zimmermann<mailto:reto@gnu.org>; Eli Zaretskii<mailto:eliz@gnu.org>; Cyril Arnould<mailto:cyril.arnould@outlook.com>
Betreff: bug#63251: 28.2; vhdl-mode contribution

> Following bug#62508, I've taken a bit of a closer look at the compiler
> regexp for ModelSim. I've modified it so that it can differentiate
> between Errors, Warnings and Notes when highlighting. I also make use of
> Xilinx Vivado at work, for which I've added a new compiler entry:

Sorry, but computer says no. The modified vhdl-compiler-alist value does not match its declared type.

You can easily check this by running `M-x customize-variable vhdl-compiler-alist`; it will show the contents as a single big text field and say (mismatch).
If the value matches the type, it would have shown the value structurally.

Another check is to run `make -C test test-custom-opts`, which checks the values of all defcustom variables in Emacs.

In this case it seems to be the `(2 . 3)` values at the end of the error message sublists. Remove them and the value matches the type.
If those (2 . 3) are important, perhaps you want to change the type instead but you would have to maintain compatibility somehow. I see there is a lot of code dealing with changes to the type of that variable in vhdl-mode.el.





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diff --git "a/lisp/progmodes/vhdl-mode.el" "b/lisp/progmodes/vhdl-mode.el"
index ee0ec63b6bc..6c951ee8af3 100644
--- "a/lisp/progmodes/vhdl-mode.el"
+++ "b/lisp/progmodes/vhdl-mode.el"
@@ -229,20 +229,20 @@ vhdl-compiler-alist
     ;; [Error] Assignment error: variable is illegal target of signal assignment
     ("ADVance MS" "vacom" "-work \\1" "make" "-f \\1"
      nil "valib \\1; vamap \\2 \\1" "./" "work/" "Makefile" "adms"
-     ("^\\s-+\\([0-9]+\\):\\s-+" nil 1 nil) ("^Compiling file \\(.+\\)" 1)
+     ("^\\s-+\\([0-9]+\\):\\s-+" nil 1 nil nil) ("^Compiling file \\(.+\\)" 1)
      ("ENTI/\\1.vif" "ARCH/\\1-\\2.vif" "CONF/\\1.vif"
       "PACK/\\1.vif" "BODY/\\1.vif" upcase))
     ;; Aldec
     ;; COMP96 ERROR COMP96_0018: "Identifier expected." "test.vhd" 66 3
     ("Aldec" "vcom" "-work \\1" "make" "-f \\1"
      nil "vlib \\1; vmap \\2 \\1" "./" "work/" "Makefile" "aldec"
-     ("^.* ERROR [^:]+: \".*\" \"\\([^ \t\n]+\\)\" \\([0-9]+\\) \\([0-9]+\\)" 1 2 3) ("" 0)
+     ("^.* ERROR [^:]+: \".*\" \"\\([^ \t\n]+\\)\" \\([0-9]+\\) \\([0-9]+\\)" 1 2 3 nil) ("" 0)
      nil)
     ;; Cadence Leapfrog: cv -file test.vhd
     ;; duluth: *E,430 (test.vhd,13): identifier (POSITIV) is not declared
     ("Cadence Leapfrog" "cv" "-work \\1 -file" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "leapfrog"
-     ("^duluth: \\*E,[0-9]+ (\\([^ \t\n]+\\),\\([0-9]+\\)):" 1 2 nil) ("" 0)
+     ("^duluth: \\*E,[0-9]+ (\\([^ \t\n]+\\),\\([0-9]+\\)):" 1 2 nil nil) ("" 0)
      ("\\1/entity" "\\2/\\1" "\\1/configuration"
       "\\1/package" "\\1/body" downcase))
     ;; Cadence Affirma NC vhdl: ncvhdl test.vhd
@@ -250,7 +250,7 @@ vhdl-compiler-alist
     ;; (PLL_400X_TOP) is not declared [10.3].
     ("Cadence NC" "ncvhdl" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ncvhdl"
-     ("^ncvhdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3) ("" 0)
+     ("^ncvhdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3 nil) ("" 0)
      ("\\1/entity/pc.db" "\\2/\\1/pc.db" "\\1/configuration/pc.db"
       "\\1/package/pc.db" "\\1/body/pc.db" downcase))
     ;; ghdl vhdl
@@ -258,21 +258,21 @@ vhdl-compiler-alist
     ;; bad_counter.vhdl:13:14: operator "=" is overloaded
     ("GHDL" "ghdl" "-i --workdir=\\1 --ieee=synopsys -fexplicit " "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ghdl"
-     ("^ghdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3) ("" 0)
+     ("^ghdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3 nil) ("" 0)
      ("\\1/entity" "\\2/\\1" "\\1/configuration"
       "\\1/package" "\\1/body" downcase))
     ;; IBM Compiler
     ;; 00 COACHDL* | [CCHDL-1]: File: adder.vhd, line.column: 120.6
     ("IBM Compiler" "g2tvc" "-src" "precomp" "\\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ibm"
-     ("^[0-9]+ COACHDL.*: File: \\([^ \t\n]+\\), *line.column: \\([0-9]+\\).\\([0-9]+\\)" 1 2 3) (" " 0)
+     ("^[0-9]+ COACHDL.*: File: \\([^ \t\n]+\\), *line.column: \\([0-9]+\\).\\([0-9]+\\)" 1 2 3 nil) (" " 0)
      nil)
     ;; Ikos Voyager: analyze test.vhd
     ;; analyze test.vhd
     ;; E L4/C5:        this library unit is inaccessible
     ("Ikos" "analyze" "-l \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ikos"
-     ("^E L\\([0-9]+\\)/C\\([0-9]+\\):" nil 1 2)
+     ("^E L\\([0-9]+\\)/C\\([0-9]+\\):" nil 1 2 nil)
      ("^analyze +\\(.+ +\\)*\\(.+\\)$" 2)
      nil)
     ;; ModelSim, Model Technology: vcom test.vhd
@@ -294,7 +294,7 @@ vhdl-compiler-alist
     ;; test.vhd:34: error message
     ("LEDA ProVHDL" "provhdl" "-w \\1 -f" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "provhdl"
-     ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil) ("" 0)
+     ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil nil) ("" 0)
      ("ENTI/\\1.vif" "ARCH/\\1-\\2.vif" "CONF/\\1.vif"
       "PACK/\\1.vif" "BODY/BODY-\\1.vif" upcase))
     ;; Quartus compiler
@@ -305,14 +305,14 @@ vhdl-compiler-alist
     ;; Warning: VHDL Process Statement warning at dvi2sdi_tst.vhd(172): ...
     ("Quartus" "make" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "quartus"
-     ("^\\(Error\\|Warning\\): .* \\([^ \t\n]+\\)(\\([0-9]+\\))" 2 3 nil) ("" 0)
+     ("^\\(Error\\|Warning\\): .* \\([^ \t\n]+\\)(\\([0-9]+\\))" 2 3 nil nil) ("" 0)
      nil)
     ;; QuickHDL, Mentor Graphics: qvhcom test.vhd
     ;; ERROR: test.vhd(24): near "dnd": expecting: END
     ;; WARNING[4]: test.vhd(30): A space is required between ...
     ("QuickHDL" "qvhcom" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "quickhdl"
-     ("^\\(ERROR\\|WARNING\\)[^:]*: \\([^ \t\n]+\\)(\\([0-9]+\\)):" 2 3 nil) ("" 0)
+     ("^\\(ERROR\\|WARNING\\)[^:]*: \\([^ \t\n]+\\)(\\([0-9]+\\)):" 2 3 nil nil) ("" 0)
      ("\\1/_primary.dat" "\\2/\\1.dat" "\\1/_primary.dat"
       "\\1/_primary.dat" "\\1/body.dat" downcase))
     ;; Savant: scram -publish-cc test.vhd
@@ -327,39 +327,39 @@ vhdl-compiler-alist
     ;; Error: CSVHDL0002: test.vhd: (line 97): Invalid prefix
     ("Simili" "vhdlp" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "simili"
-     ("^\\(Error\\|Warning\\): \\w+: \\([^ \t\n]+\\): (line \\([0-9]+\\)): " 2 3 nil) ("" 0)
+     ("^\\(Error\\|Warning\\): \\w+: \\([^ \t\n]+\\): (line \\([0-9]+\\)): " 2 3 nil nil) ("" 0)
      ("\\1/prim.var" "\\2/_\\1.var" "\\1/prim.var"
       "\\1/prim.var" "\\1/_body.var" downcase))
     ;; Speedwave (Innoveda): analyze -libfile vsslib.ini -src test.vhd
     ;;     ERROR[11]::File test.vhd Line 100: Use of undeclared identifier
     ("Speedwave" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "speedwave"
-     ("^ *ERROR\\[[0-9]+]::File \\([^ \t\n]+\\) Line \\([0-9]+\\):" 1 2 nil) ("" 0)
+     ("^ *ERROR\\[[0-9]+]::File \\([^ \t\n]+\\) Line \\([0-9]+\\):" 1 2 nil nil) ("" 0)
      nil)
     ;; Synopsys, VHDL Analyzer (sim): vhdlan -nc test.vhd
     ;; **Error: vhdlan,703 test.vhd(22): OTHERS is not legal in this context.
     ("Synopsys" "vhdlan" "-nc -work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "synopsys"
-     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil) ("" 0)
+     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil nil) ("" 0)
      ("\\1.sim" "\\2__\\1.sim" "\\1.sim" "\\1.sim" "\\1__.sim" upcase))
     ;; Synopsys, VHDL Analyzer (syn): vhdlan -nc -spc test.vhd
     ;; **Error: vhdlan,703 test.vhd(22): OTHERS is not legal in this context.
     ("Synopsys Design Compiler" "vhdlan" "-nc -spc -work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "synopsys_dc"
-     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil) ("" 0)
+     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil nil) ("" 0)
      ("\\1.syn" "\\2__\\1.syn" "\\1.syn" "\\1.syn" "\\1__.syn" upcase))
     ;; Synplify:
     ;; @W:"test.vhd":57:8:57:9|Optimizing register bit count_x(5) to a constant 0
     ("Synplify" "n/a" "n/a" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "synplify"
-     ("^@[EWN]:\"\\([^ \t\n]+\\)\":\\([0-9]+\\):\\([0-9]+\\):" 1 2 3) ("" 0)
+     ("^@[EWN]:\"\\([^ \t\n]+\\)\":\\([0-9]+\\):\\([0-9]+\\):" 1 2 3 nil) ("" 0)
      nil)
     ;; Vantage: analyze -libfile vsslib.ini -src test.vhd
     ;;     Compiling "test.vhd" line 1...
     ;; **Error: LINE 49 *** No aggregate value is valid in this context.
     ("Vantage" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "vantage"
-     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil)
+     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil nil)
      ("^ *Compiling \"\\(.+\\)\" " 1)
      nil)
     ;; VeriBest: vc vhdl test.vhd
@@ -369,26 +369,26 @@ vhdl-compiler-alist
     ;; [Error] Name BITA is unknown
     ("VeriBest" "vc" "vhdl" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "veribest"
-     ("^ +\\([0-9]+\\): +[^ ]" nil 1 nil) ("" 0)
+     ("^ +\\([0-9]+\\): +[^ ]" nil 1 nil nil) ("" 0)
      nil)
     ;; Viewlogic: analyze -libfile vsslib.ini -src test.vhd
     ;;     Compiling "test.vhd" line 1...
     ;; **Error: LINE 49 *** No aggregate value is valid in this context.
     ("Viewlogic" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "viewlogic"
-     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil)
+     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil nil)
      ("^ *Compiling \"\\(.+\\)\" " 1)
      nil)
     ;; Xilinx XST:
     ;; ERROR:HDLParsers:164 - "test.vhd" Line 3. parse error
     ("Xilinx XST" "xflow" "" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "xilinx"
-     ("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil) ("" 0)
+     ("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil nil) ("" 0)
      nil)
     ;; Xilinx Vivado:
     ;; ERROR: [VRFC 10-1412] syntax error near o_idle [test.vhd:23]
     ("Xilinx Vivado" "xvhdl" "" "make" "-f \\1"
-     nil "mkdir \\1" "./" "work" "Makefile" "vivado"
+     nil "mkdir \\1" "./" "work/" "Makefile" "vivado"
      ("^\\(?:\\(?1:ERROR\\)\\|\\(?2:WARNING\\)\\|\\(?3:INFO\\)\\): \\(.+\\) \\[\\(?4:[^ \t\n]+\\):\\(?5:[0-9]+\\)\\]" 4 5 nil (2 . 3)) ("" 0)
      ("\\1/entity" "\\2/\\1" "\\1/configuration"
       "\\1/package" "\\1/body" downcase))
@@ -414,6 +414,13 @@ vhdl-compiler-alist
   File subexp index: index of subexpression that matches the file name
   Line subexp index: index of subexpression that matches the line number
   Column subexp idx: index of subexpression that matches the column number
+  Type subexp      : message type, can be 2 or nil for a real error, 1 for
+                     warning or 0 for info. Can also be of the form
+                     (WARNING . INFO).  In that case this will be equivalent to
+                     1 if the WARNING’th subexpression matched or else
+                     equivalent to 0 if the INFO’th subexpression matched, or
+                     else equivalent to 2 if neither of them matched. See also
+                     `compilation-error-regexp-alist'.
 File message:
   Regexp           : regular expression to match a file name message
   File subexp index: index of subexpression that matches the file name
@@ -483,7 +490,12 @@ vhdl-compiler-alist
 		      (integer :tag "Line subexp index")
 		      (choice  :tag "Column subexp    "
 			      (integer :tag "Index")
-			      (const :tag "No column number" nil)))
+			      (const :tag "No column number" nil))
+			    (choice  :tag "Type    "
+			      (const :tag "Info" 0)
+			      (const :tag "Warning" 1)
+			      (const :tag "Error" nil)
+			      (sexp :tag "(WARNING . INFO)")))
 		(list :tag "File message" :indent 4
 		      (regexp  :tag "Regexp           ")
 		      (integer :tag "File subexp index"))
@@ -2451,6 +2463,15 @@ vhdl-print-warnings
       (setq tmp-alist (cdr tmp-alist))))
   (customize-save-variable 'vhdl-compiler-alist vhdl-compiler-alist))
 
+;; option `vhdl-compiler-alist' changed format (3.38.1)
+(when (= (length (nth 11 (car vhdl-compiler-alist))) 4)
+  (let ((tmp-alist vhdl-compiler-alist))
+    (while tmp-alist
+      (setcdr (nthcdr 3 (nth 11 (car tmp-alist)))
+	      '(nil . nil))
+      (setq tmp-alist (cdr tmp-alist))))
+  (customize-save-variable 'vhdl-compiler-alist vhdl-compiler-alist))
+
 ;; option `vhdl-project': empty value changed from "" to nil (3.31.1)
 (when (equal vhdl-project "")
   (setq vhdl-project nil)

bug#63251: 28.2; vhdl-mode contribution

[Mattias Engdegård]

The vhdl-mode maintainers need to look at your patch more closely; I just have some minor remarks.

7 maj 2023 kl. 00.11 skrev Cyril Arnould <cyril.arnould@outlook.com>:

> - I've added TYPE to the vhdl-compiler definition with the
>   appropriate choices for Info/Warning/Error and the dotted
>   pair. I'm not sure if sexp was the correct choice for the
>   dotted pair, is there a better alternative?

There is (cons ...) which would be more precise, see the manual.

The new doc string says that a TYPE of 2 is allowed but the type spec doesn't allow it.
Either allow both 2 and nil or change the docs to only mention one of them.

> - I added another entry to the backwards compatibility code, all
>   it took was a slight modification of the entry before
>   that.

That's fine, but I'd be a bit more careful with the destructive in-place changes and quoted list constants. (Think of what happens if later code performs an in-place change of that nil you added.)
This isn't performance-critical-code, we can afford consing here.

bug#63251: AW: bug#63251: 28.2; vhdl-mode contribution

[Cyril Arnould]

[-- Attachment #1.1: Type: text/plain, Size: 2371 bytes --]

Thanks for the feedback.

> There is (cons ...) which would be more precise, see the manual.

I had tried (cons …) instead of (sexp …), but that just resulted in
the customization menu breaking again if one of the compilers was set
to a dotted list.

> The new doc string says that a TYPE of 2 is allowed but the type spec doesn't allow it.
> Either allow both 2 and nil or change the docs to only mention one of them.

Makes sense. It’s probably more user-friendly (not to mention easier)
to just allow one of them.

> Think of what happens if later code performs an in-place change of that nil you added.

I am by no means an expert when it comes to elisp, I don’t know what
kind of problems this could cause. Would using 2 rather than nil make
more sense for this? I’ve checked compile.el, and internally they
remap nil to 2 and use that, so 2 would also be more explicit I guess.

I've modifided the patch to use 2 rather than nil (exclusively).


Von: Mattias Engdegård<mailto:mattias.engdegard@gmail.com>
Gesendet: Sonntag, 7. Mai 2023 10:17
An: Cyril Arnould<mailto:cyril.arnould@outlook.com>
Cc: 63251@debbugs.gnu.org<mailto:63251@debbugs.gnu.org>; Reto Zimmermann<mailto:reto@gnu.org>; Eli Zaretskii<mailto:eliz@gnu.org>
Betreff: Re: bug#63251: 28.2; vhdl-mode contribution

The vhdl-mode maintainers need to look at your patch more closely; I just have some minor remarks.

7 maj 2023 kl. 00.11 skrev Cyril Arnould <cyril.arnould@outlook.com>:

> - I've added TYPE to the vhdl-compiler definition with the
>   appropriate choices for Info/Warning/Error and the dotted
>   pair. I'm not sure if sexp was the correct choice for the
>   dotted pair, is there a better alternative?

There is (cons ...) which would be more precise, see the manual.

The new doc string says that a TYPE of 2 is allowed but the type spec doesn't allow it.
Either allow both 2 and nil or change the docs to only mention one of them.

> - I added another entry to the backwards compatibility code, all
>   it took was a slight modification of the entry before
>   that.

That's fine, but I'd be a bit more careful with the destructive in-place changes and quoted list constants. (Think of what happens if later code performs an in-place change of that nil you added.)
This isn't performance-critical-code, we can afford consing here.


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[-- Attachment #2: fix-vhdl-compiler-customization-2.patch --]
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diff --git "a/lisp/progmodes/vhdl-mode.el" "b/lisp/progmodes/vhdl-mode.el"
index ee0ec63b6bc..41c00d4c873 100644
--- "a/lisp/progmodes/vhdl-mode.el"
+++ "b/lisp/progmodes/vhdl-mode.el"
@@ -229,20 +229,20 @@ vhdl-compiler-alist
     ;; [Error] Assignment error: variable is illegal target of signal assignment
     ("ADVance MS" "vacom" "-work \\1" "make" "-f \\1"
      nil "valib \\1; vamap \\2 \\1" "./" "work/" "Makefile" "adms"
-     ("^\\s-+\\([0-9]+\\):\\s-+" nil 1 nil) ("^Compiling file \\(.+\\)" 1)
+     ("^\\s-+\\([0-9]+\\):\\s-+" nil 1 nil 2) ("^Compiling file \\(.+\\)" 1)
      ("ENTI/\\1.vif" "ARCH/\\1-\\2.vif" "CONF/\\1.vif"
       "PACK/\\1.vif" "BODY/\\1.vif" upcase))
     ;; Aldec
     ;; COMP96 ERROR COMP96_0018: "Identifier expected." "test.vhd" 66 3
     ("Aldec" "vcom" "-work \\1" "make" "-f \\1"
      nil "vlib \\1; vmap \\2 \\1" "./" "work/" "Makefile" "aldec"
-     ("^.* ERROR [^:]+: \".*\" \"\\([^ \t\n]+\\)\" \\([0-9]+\\) \\([0-9]+\\)" 1 2 3) ("" 0)
+     ("^.* ERROR [^:]+: \".*\" \"\\([^ \t\n]+\\)\" \\([0-9]+\\) \\([0-9]+\\)" 1 2 3 2) ("" 0)
      nil)
     ;; Cadence Leapfrog: cv -file test.vhd
     ;; duluth: *E,430 (test.vhd,13): identifier (POSITIV) is not declared
     ("Cadence Leapfrog" "cv" "-work \\1 -file" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "leapfrog"
-     ("^duluth: \\*E,[0-9]+ (\\([^ \t\n]+\\),\\([0-9]+\\)):" 1 2 nil) ("" 0)
+     ("^duluth: \\*E,[0-9]+ (\\([^ \t\n]+\\),\\([0-9]+\\)):" 1 2 nil 2) ("" 0)
      ("\\1/entity" "\\2/\\1" "\\1/configuration"
       "\\1/package" "\\1/body" downcase))
     ;; Cadence Affirma NC vhdl: ncvhdl test.vhd
@@ -250,7 +250,7 @@ vhdl-compiler-alist
     ;; (PLL_400X_TOP) is not declared [10.3].
     ("Cadence NC" "ncvhdl" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ncvhdl"
-     ("^ncvhdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3) ("" 0)
+     ("^ncvhdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3 2) ("" 0)
      ("\\1/entity/pc.db" "\\2/\\1/pc.db" "\\1/configuration/pc.db"
       "\\1/package/pc.db" "\\1/body/pc.db" downcase))
     ;; ghdl vhdl
@@ -258,21 +258,21 @@ vhdl-compiler-alist
     ;; bad_counter.vhdl:13:14: operator "=" is overloaded
     ("GHDL" "ghdl" "-i --workdir=\\1 --ieee=synopsys -fexplicit " "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ghdl"
-     ("^ghdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3) ("" 0)
+     ("^ghdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3 2) ("" 0)
      ("\\1/entity" "\\2/\\1" "\\1/configuration"
       "\\1/package" "\\1/body" downcase))
     ;; IBM Compiler
     ;; 00 COACHDL* | [CCHDL-1]: File: adder.vhd, line.column: 120.6
     ("IBM Compiler" "g2tvc" "-src" "precomp" "\\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ibm"
-     ("^[0-9]+ COACHDL.*: File: \\([^ \t\n]+\\), *line.column: \\([0-9]+\\).\\([0-9]+\\)" 1 2 3) (" " 0)
+     ("^[0-9]+ COACHDL.*: File: \\([^ \t\n]+\\), *line.column: \\([0-9]+\\).\\([0-9]+\\)" 1 2 3 2) (" " 0)
      nil)
     ;; Ikos Voyager: analyze test.vhd
     ;; analyze test.vhd
     ;; E L4/C5:        this library unit is inaccessible
     ("Ikos" "analyze" "-l \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ikos"
-     ("^E L\\([0-9]+\\)/C\\([0-9]+\\):" nil 1 2)
+     ("^E L\\([0-9]+\\)/C\\([0-9]+\\):" nil 1 2 2)
      ("^analyze +\\(.+ +\\)*\\(.+\\)$" 2)
      nil)
     ;; ModelSim, Model Technology: vcom test.vhd
@@ -294,7 +294,7 @@ vhdl-compiler-alist
     ;; test.vhd:34: error message
     ("LEDA ProVHDL" "provhdl" "-w \\1 -f" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "provhdl"
-     ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil) ("" 0)
+     ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil 2) ("" 0)
      ("ENTI/\\1.vif" "ARCH/\\1-\\2.vif" "CONF/\\1.vif"
       "PACK/\\1.vif" "BODY/BODY-\\1.vif" upcase))
     ;; Quartus compiler
@@ -305,21 +305,21 @@ vhdl-compiler-alist
     ;; Warning: VHDL Process Statement warning at dvi2sdi_tst.vhd(172): ...
     ("Quartus" "make" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "quartus"
-     ("^\\(Error\\|Warning\\): .* \\([^ \t\n]+\\)(\\([0-9]+\\))" 2 3 nil) ("" 0)
+     ("^\\(Error\\|Warning\\): .* \\([^ \t\n]+\\)(\\([0-9]+\\))" 2 3 nil 2) ("" 0)
      nil)
     ;; QuickHDL, Mentor Graphics: qvhcom test.vhd
     ;; ERROR: test.vhd(24): near "dnd": expecting: END
     ;; WARNING[4]: test.vhd(30): A space is required between ...
     ("QuickHDL" "qvhcom" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "quickhdl"
-     ("^\\(ERROR\\|WARNING\\)[^:]*: \\([^ \t\n]+\\)(\\([0-9]+\\)):" 2 3 nil) ("" 0)
+     ("^\\(ERROR\\|WARNING\\)[^:]*: \\([^ \t\n]+\\)(\\([0-9]+\\)):" 2 3 nil 2) ("" 0)
      ("\\1/_primary.dat" "\\2/\\1.dat" "\\1/_primary.dat"
       "\\1/_primary.dat" "\\1/body.dat" downcase))
     ;; Savant: scram -publish-cc test.vhd
     ;; test.vhd:87: _set_passed_through_out_port(IIR_Boolean) not defined for
     ("Savant" "scram" "-publish-cc -design-library-name \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work._savant_lib/" "Makefile" "savant"
-     ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil) ("" 0)
+     ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil 2) ("" 0)
      ("\\1_entity.vhdl" "\\2_secondary_units._savant_lib/\\2_\\1.vhdl"
       "\\1_config.vhdl" "\\1_package.vhdl"
       "\\1_secondary_units._savant_lib/\\1_package_body.vhdl" downcase))
@@ -327,39 +327,39 @@ vhdl-compiler-alist
     ;; Error: CSVHDL0002: test.vhd: (line 97): Invalid prefix
     ("Simili" "vhdlp" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "simili"
-     ("^\\(Error\\|Warning\\): \\w+: \\([^ \t\n]+\\): (line \\([0-9]+\\)): " 2 3 nil) ("" 0)
+     ("^\\(Error\\|Warning\\): \\w+: \\([^ \t\n]+\\): (line \\([0-9]+\\)): " 2 3 nil 2) ("" 0)
      ("\\1/prim.var" "\\2/_\\1.var" "\\1/prim.var"
       "\\1/prim.var" "\\1/_body.var" downcase))
     ;; Speedwave (Innoveda): analyze -libfile vsslib.ini -src test.vhd
     ;;     ERROR[11]::File test.vhd Line 100: Use of undeclared identifier
     ("Speedwave" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "speedwave"
-     ("^ *ERROR\\[[0-9]+]::File \\([^ \t\n]+\\) Line \\([0-9]+\\):" 1 2 nil) ("" 0)
+     ("^ *ERROR\\[[0-9]+]::File \\([^ \t\n]+\\) Line \\([0-9]+\\):" 1 2 nil 2) ("" 0)
      nil)
     ;; Synopsys, VHDL Analyzer (sim): vhdlan -nc test.vhd
     ;; **Error: vhdlan,703 test.vhd(22): OTHERS is not legal in this context.
     ("Synopsys" "vhdlan" "-nc -work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "synopsys"
-     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil) ("" 0)
+     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil 2) ("" 0)
      ("\\1.sim" "\\2__\\1.sim" "\\1.sim" "\\1.sim" "\\1__.sim" upcase))
     ;; Synopsys, VHDL Analyzer (syn): vhdlan -nc -spc test.vhd
     ;; **Error: vhdlan,703 test.vhd(22): OTHERS is not legal in this context.
     ("Synopsys Design Compiler" "vhdlan" "-nc -spc -work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "synopsys_dc"
-     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil) ("" 0)
+     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil 2) ("" 0)
      ("\\1.syn" "\\2__\\1.syn" "\\1.syn" "\\1.syn" "\\1__.syn" upcase))
     ;; Synplify:
     ;; @W:"test.vhd":57:8:57:9|Optimizing register bit count_x(5) to a constant 0
     ("Synplify" "n/a" "n/a" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "synplify"
-     ("^@[EWN]:\"\\([^ \t\n]+\\)\":\\([0-9]+\\):\\([0-9]+\\):" 1 2 3) ("" 0)
+     ("^@[EWN]:\"\\([^ \t\n]+\\)\":\\([0-9]+\\):\\([0-9]+\\):" 1 2 3 2) ("" 0)
      nil)
     ;; Vantage: analyze -libfile vsslib.ini -src test.vhd
     ;;     Compiling "test.vhd" line 1...
     ;; **Error: LINE 49 *** No aggregate value is valid in this context.
     ("Vantage" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "vantage"
-     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil)
+     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil 2)
      ("^ *Compiling \"\\(.+\\)\" " 1)
      nil)
     ;; VeriBest: vc vhdl test.vhd
@@ -369,26 +369,26 @@ vhdl-compiler-alist
     ;; [Error] Name BITA is unknown
     ("VeriBest" "vc" "vhdl" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "veribest"
-     ("^ +\\([0-9]+\\): +[^ ]" nil 1 nil) ("" 0)
+     ("^ +\\([0-9]+\\): +[^ ]" nil 1 nil 2) ("" 0)
      nil)
     ;; Viewlogic: analyze -libfile vsslib.ini -src test.vhd
     ;;     Compiling "test.vhd" line 1...
     ;; **Error: LINE 49 *** No aggregate value is valid in this context.
     ("Viewlogic" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "viewlogic"
-     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil)
+     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil 2)
      ("^ *Compiling \"\\(.+\\)\" " 1)
      nil)
     ;; Xilinx XST:
     ;; ERROR:HDLParsers:164 - "test.vhd" Line 3. parse error
     ("Xilinx XST" "xflow" "" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "xilinx"
-     ("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil) ("" 0)
+     ("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil 2) ("" 0)
      nil)
     ;; Xilinx Vivado:
     ;; ERROR: [VRFC 10-1412] syntax error near o_idle [test.vhd:23]
     ("Xilinx Vivado" "xvhdl" "" "make" "-f \\1"
-     nil "mkdir \\1" "./" "work" "Makefile" "vivado"
+     nil "mkdir \\1" "./" "work/" "Makefile" "vivado"
      ("^\\(?:\\(?1:ERROR\\)\\|\\(?2:WARNING\\)\\|\\(?3:INFO\\)\\): \\(.+\\) \\[\\(?4:[^ \t\n]+\\):\\(?5:[0-9]+\\)\\]" 4 5 nil (2 . 3)) ("" 0)
      ("\\1/entity" "\\2/\\1" "\\1/configuration"
       "\\1/package" "\\1/body" downcase))
@@ -414,6 +414,13 @@ vhdl-compiler-alist
   File subexp index: index of subexpression that matches the file name
   Line subexp index: index of subexpression that matches the line number
   Column subexp idx: index of subexpression that matches the column number
+  Type subexp      : message type, can be 2 for a real error, 1 for warning or
+                     0 for info. Can also be of the form (WARNING . INFO).  In
+                     that case this will be equivalent to 1 if the WARNING’th
+                     subexpression matched or else equivalent to 0 if the
+                     INFO’th subexpression matched, or else equivalent to 2 if
+                     neither of them matched. See also
+                     `compilation-error-regexp-alist'.
 File message:
   Regexp           : regular expression to match a file name message
   File subexp index: index of subexpression that matches the file name
@@ -483,7 +490,12 @@ vhdl-compiler-alist
 		      (integer :tag "Line subexp index")
 		      (choice  :tag "Column subexp    "
 			      (integer :tag "Index")
-			      (const :tag "No column number" nil)))
+			      (const :tag "No column number" nil))
+			    (choice  :tag "Type    "
+			      (const :tag "Info" 0)
+			      (const :tag "Warning" 1)
+			      (const :tag "Error" nil)
+			      (sexp :tag "(WARNING . INFO)")))
 		(list :tag "File message" :indent 4
 		      (regexp  :tag "Regexp           ")
 		      (integer :tag "File subexp index"))
@@ -2451,6 +2463,15 @@ vhdl-print-warnings
       (setq tmp-alist (cdr tmp-alist))))
   (customize-save-variable 'vhdl-compiler-alist vhdl-compiler-alist))
 
+;; option `vhdl-compiler-alist' changed format (3.38.1)
+(when (= (length (nth 11 (car vhdl-compiler-alist))) 4)
+  (let ((tmp-alist vhdl-compiler-alist))
+    (while tmp-alist
+      (setcdr (nthcdr 3 (nth 11 (car tmp-alist)))
+	      '(2 . nil))
+      (setq tmp-alist (cdr tmp-alist))))
+  (customize-save-variable 'vhdl-compiler-alist vhdl-compiler-alist))
+
 ;; option `vhdl-project': empty value changed from "" to nil (3.31.1)
 (when (equal vhdl-project "")
   (setq vhdl-project nil)

bug#63251: AW: bug#63251: 28.2; vhdl-mode contribution

[Cyril Arnould]

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Very sorry, I just noticed that I messed up the previous patch. Third time’s the charm.

________________________________
Von: Mattias Engdegård <mattiasengdegard@gmail.com> im Auftrag von Mattias Engdegård <mattias.engdegard@gmail.com>
Gesendet: Sunday, May 7, 2023 10:17:03 AM
An: Cyril Arnould <cyril.arnould@outlook.com>
Cc: 63251@debbugs.gnu.org <63251@debbugs.gnu.org>; Reto Zimmermann <reto@gnu.org>; Eli Zaretskii <eliz@gnu.org>
Betreff: Re: bug#63251: 28.2; vhdl-mode contribution

The vhdl-mode maintainers need to look at your patch more closely; I just have some minor remarks.

7 maj 2023 kl. 00.11 skrev Cyril Arnould <cyril.arnould@outlook.com>:

> - I've added TYPE to the vhdl-compiler definition with the
>   appropriate choices for Info/Warning/Error and the dotted
>   pair. I'm not sure if sexp was the correct choice for the
>   dotted pair, is there a better alternative?

There is (cons ...) which would be more precise, see the manual.

The new doc string says that a TYPE of 2 is allowed but the type spec doesn't allow it.
Either allow both 2 and nil or change the docs to only mention one of them.

> - I added another entry to the backwards compatibility code, all
>   it took was a slight modification of the entry before
>   that.

That's fine, but I'd be a bit more careful with the destructive in-place changes and quoted list constants. (Think of what happens if later code performs an in-place change of that nil you added.)
This isn't performance-critical-code, we can afford consing here.


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diff --git "a/lisp/progmodes/vhdl-mode.el" "b/lisp/progmodes/vhdl-mode.el"
index ee0ec63b6bc..cdaaf4277ee 100644
--- "a/lisp/progmodes/vhdl-mode.el"
+++ "b/lisp/progmodes/vhdl-mode.el"
@@ -229,20 +229,20 @@ vhdl-compiler-alist
     ;; [Error] Assignment error: variable is illegal target of signal assignment
     ("ADVance MS" "vacom" "-work \\1" "make" "-f \\1"
      nil "valib \\1; vamap \\2 \\1" "./" "work/" "Makefile" "adms"
-     ("^\\s-+\\([0-9]+\\):\\s-+" nil 1 nil) ("^Compiling file \\(.+\\)" 1)
+     ("^\\s-+\\([0-9]+\\):\\s-+" nil 1 nil 2) ("^Compiling file \\(.+\\)" 1)
      ("ENTI/\\1.vif" "ARCH/\\1-\\2.vif" "CONF/\\1.vif"
       "PACK/\\1.vif" "BODY/\\1.vif" upcase))
     ;; Aldec
     ;; COMP96 ERROR COMP96_0018: "Identifier expected." "test.vhd" 66 3
     ("Aldec" "vcom" "-work \\1" "make" "-f \\1"
      nil "vlib \\1; vmap \\2 \\1" "./" "work/" "Makefile" "aldec"
-     ("^.* ERROR [^:]+: \".*\" \"\\([^ \t\n]+\\)\" \\([0-9]+\\) \\([0-9]+\\)" 1 2 3) ("" 0)
+     ("^.* ERROR [^:]+: \".*\" \"\\([^ \t\n]+\\)\" \\([0-9]+\\) \\([0-9]+\\)" 1 2 3 2) ("" 0)
      nil)
     ;; Cadence Leapfrog: cv -file test.vhd
     ;; duluth: *E,430 (test.vhd,13): identifier (POSITIV) is not declared
     ("Cadence Leapfrog" "cv" "-work \\1 -file" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "leapfrog"
-     ("^duluth: \\*E,[0-9]+ (\\([^ \t\n]+\\),\\([0-9]+\\)):" 1 2 nil) ("" 0)
+     ("^duluth: \\*E,[0-9]+ (\\([^ \t\n]+\\),\\([0-9]+\\)):" 1 2 nil 2) ("" 0)
      ("\\1/entity" "\\2/\\1" "\\1/configuration"
       "\\1/package" "\\1/body" downcase))
     ;; Cadence Affirma NC vhdl: ncvhdl test.vhd
@@ -250,7 +250,7 @@ vhdl-compiler-alist
     ;; (PLL_400X_TOP) is not declared [10.3].
     ("Cadence NC" "ncvhdl" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ncvhdl"
-     ("^ncvhdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3) ("" 0)
+     ("^ncvhdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3 2) ("" 0)
      ("\\1/entity/pc.db" "\\2/\\1/pc.db" "\\1/configuration/pc.db"
       "\\1/package/pc.db" "\\1/body/pc.db" downcase))
     ;; ghdl vhdl
@@ -258,21 +258,21 @@ vhdl-compiler-alist
     ;; bad_counter.vhdl:13:14: operator "=" is overloaded
     ("GHDL" "ghdl" "-i --workdir=\\1 --ieee=synopsys -fexplicit " "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ghdl"
-     ("^ghdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3) ("" 0)
+     ("^ghdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3 2) ("" 0)
      ("\\1/entity" "\\2/\\1" "\\1/configuration"
       "\\1/package" "\\1/body" downcase))
     ;; IBM Compiler
     ;; 00 COACHDL* | [CCHDL-1]: File: adder.vhd, line.column: 120.6
     ("IBM Compiler" "g2tvc" "-src" "precomp" "\\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ibm"
-     ("^[0-9]+ COACHDL.*: File: \\([^ \t\n]+\\), *line.column: \\([0-9]+\\).\\([0-9]+\\)" 1 2 3) (" " 0)
+     ("^[0-9]+ COACHDL.*: File: \\([^ \t\n]+\\), *line.column: \\([0-9]+\\).\\([0-9]+\\)" 1 2 3 2) (" " 0)
      nil)
     ;; Ikos Voyager: analyze test.vhd
     ;; analyze test.vhd
     ;; E L4/C5:        this library unit is inaccessible
     ("Ikos" "analyze" "-l \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ikos"
-     ("^E L\\([0-9]+\\)/C\\([0-9]+\\):" nil 1 2)
+     ("^E L\\([0-9]+\\)/C\\([0-9]+\\):" nil 1 2 2)
      ("^analyze +\\(.+ +\\)*\\(.+\\)$" 2)
      nil)
     ;; ModelSim, Model Technology: vcom test.vhd
@@ -294,7 +294,7 @@ vhdl-compiler-alist
     ;; test.vhd:34: error message
     ("LEDA ProVHDL" "provhdl" "-w \\1 -f" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "provhdl"
-     ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil) ("" 0)
+     ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil 2) ("" 0)
      ("ENTI/\\1.vif" "ARCH/\\1-\\2.vif" "CONF/\\1.vif"
       "PACK/\\1.vif" "BODY/BODY-\\1.vif" upcase))
     ;; Quartus compiler
@@ -305,21 +305,21 @@ vhdl-compiler-alist
     ;; Warning: VHDL Process Statement warning at dvi2sdi_tst.vhd(172): ...
     ("Quartus" "make" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "quartus"
-     ("^\\(Error\\|Warning\\): .* \\([^ \t\n]+\\)(\\([0-9]+\\))" 2 3 nil) ("" 0)
+     ("^\\(Error\\|Warning\\): .* \\([^ \t\n]+\\)(\\([0-9]+\\))" 2 3 nil 2) ("" 0)
      nil)
     ;; QuickHDL, Mentor Graphics: qvhcom test.vhd
     ;; ERROR: test.vhd(24): near "dnd": expecting: END
     ;; WARNING[4]: test.vhd(30): A space is required between ...
     ("QuickHDL" "qvhcom" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "quickhdl"
-     ("^\\(ERROR\\|WARNING\\)[^:]*: \\([^ \t\n]+\\)(\\([0-9]+\\)):" 2 3 nil) ("" 0)
+     ("^\\(ERROR\\|WARNING\\)[^:]*: \\([^ \t\n]+\\)(\\([0-9]+\\)):" 2 3 nil 2) ("" 0)
      ("\\1/_primary.dat" "\\2/\\1.dat" "\\1/_primary.dat"
       "\\1/_primary.dat" "\\1/body.dat" downcase))
     ;; Savant: scram -publish-cc test.vhd
     ;; test.vhd:87: _set_passed_through_out_port(IIR_Boolean) not defined for
     ("Savant" "scram" "-publish-cc -design-library-name \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work._savant_lib/" "Makefile" "savant"
-     ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil) ("" 0)
+     ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil 2) ("" 0)
      ("\\1_entity.vhdl" "\\2_secondary_units._savant_lib/\\2_\\1.vhdl"
       "\\1_config.vhdl" "\\1_package.vhdl"
       "\\1_secondary_units._savant_lib/\\1_package_body.vhdl" downcase))
@@ -327,39 +327,39 @@ vhdl-compiler-alist
     ;; Error: CSVHDL0002: test.vhd: (line 97): Invalid prefix
     ("Simili" "vhdlp" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "simili"
-     ("^\\(Error\\|Warning\\): \\w+: \\([^ \t\n]+\\): (line \\([0-9]+\\)): " 2 3 nil) ("" 0)
+     ("^\\(Error\\|Warning\\): \\w+: \\([^ \t\n]+\\): (line \\([0-9]+\\)): " 2 3 nil 2) ("" 0)
      ("\\1/prim.var" "\\2/_\\1.var" "\\1/prim.var"
       "\\1/prim.var" "\\1/_body.var" downcase))
     ;; Speedwave (Innoveda): analyze -libfile vsslib.ini -src test.vhd
     ;;     ERROR[11]::File test.vhd Line 100: Use of undeclared identifier
     ("Speedwave" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "speedwave"
-     ("^ *ERROR\\[[0-9]+]::File \\([^ \t\n]+\\) Line \\([0-9]+\\):" 1 2 nil) ("" 0)
+     ("^ *ERROR\\[[0-9]+]::File \\([^ \t\n]+\\) Line \\([0-9]+\\):" 1 2 nil 2) ("" 0)
      nil)
     ;; Synopsys, VHDL Analyzer (sim): vhdlan -nc test.vhd
     ;; **Error: vhdlan,703 test.vhd(22): OTHERS is not legal in this context.
     ("Synopsys" "vhdlan" "-nc -work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "synopsys"
-     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil) ("" 0)
+     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil 2) ("" 0)
      ("\\1.sim" "\\2__\\1.sim" "\\1.sim" "\\1.sim" "\\1__.sim" upcase))
     ;; Synopsys, VHDL Analyzer (syn): vhdlan -nc -spc test.vhd
     ;; **Error: vhdlan,703 test.vhd(22): OTHERS is not legal in this context.
     ("Synopsys Design Compiler" "vhdlan" "-nc -spc -work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "synopsys_dc"
-     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil) ("" 0)
+     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil 2) ("" 0)
      ("\\1.syn" "\\2__\\1.syn" "\\1.syn" "\\1.syn" "\\1__.syn" upcase))
     ;; Synplify:
     ;; @W:"test.vhd":57:8:57:9|Optimizing register bit count_x(5) to a constant 0
     ("Synplify" "n/a" "n/a" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "synplify"
-     ("^@[EWN]:\"\\([^ \t\n]+\\)\":\\([0-9]+\\):\\([0-9]+\\):" 1 2 3) ("" 0)
+     ("^@[EWN]:\"\\([^ \t\n]+\\)\":\\([0-9]+\\):\\([0-9]+\\):" 1 2 3 2) ("" 0)
      nil)
     ;; Vantage: analyze -libfile vsslib.ini -src test.vhd
     ;;     Compiling "test.vhd" line 1...
     ;; **Error: LINE 49 *** No aggregate value is valid in this context.
     ("Vantage" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "vantage"
-     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil)
+     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil 2)
      ("^ *Compiling \"\\(.+\\)\" " 1)
      nil)
     ;; VeriBest: vc vhdl test.vhd
@@ -369,26 +369,26 @@ vhdl-compiler-alist
     ;; [Error] Name BITA is unknown
     ("VeriBest" "vc" "vhdl" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "veribest"
-     ("^ +\\([0-9]+\\): +[^ ]" nil 1 nil) ("" 0)
+     ("^ +\\([0-9]+\\): +[^ ]" nil 1 nil 2) ("" 0)
      nil)
     ;; Viewlogic: analyze -libfile vsslib.ini -src test.vhd
     ;;     Compiling "test.vhd" line 1...
     ;; **Error: LINE 49 *** No aggregate value is valid in this context.
     ("Viewlogic" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "viewlogic"
-     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil)
+     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil 2)
      ("^ *Compiling \"\\(.+\\)\" " 1)
      nil)
     ;; Xilinx XST:
     ;; ERROR:HDLParsers:164 - "test.vhd" Line 3. parse error
     ("Xilinx XST" "xflow" "" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "xilinx"
-     ("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil) ("" 0)
+     ("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil 2) ("" 0)
      nil)
     ;; Xilinx Vivado:
     ;; ERROR: [VRFC 10-1412] syntax error near o_idle [test.vhd:23]
     ("Xilinx Vivado" "xvhdl" "" "make" "-f \\1"
-     nil "mkdir \\1" "./" "work" "Makefile" "vivado"
+     nil "mkdir \\1" "./" "work/" "Makefile" "vivado"
      ("^\\(?:\\(?1:ERROR\\)\\|\\(?2:WARNING\\)\\|\\(?3:INFO\\)\\): \\(.+\\) \\[\\(?4:[^ \t\n]+\\):\\(?5:[0-9]+\\)\\]" 4 5 nil (2 . 3)) ("" 0)
      ("\\1/entity" "\\2/\\1" "\\1/configuration"
       "\\1/package" "\\1/body" downcase))
@@ -414,6 +414,13 @@ vhdl-compiler-alist
   File subexp index: index of subexpression that matches the file name
   Line subexp index: index of subexpression that matches the line number
   Column subexp idx: index of subexpression that matches the column number
+  Type subexp      : message type, can be 2 for a real error, 1 for warning or
+                     0 for info. Can also be of the form (WARNING . INFO).  In
+                     that case this will be equivalent to 1 if the WARNING’th
+                     subexpression matched or else equivalent to 0 if the
+                     INFO’th subexpression matched, or else equivalent to 2 if
+                     neither of them matched. See also
+                     `compilation-error-regexp-alist'.
 File message:
   Regexp           : regular expression to match a file name message
   File subexp index: index of subexpression that matches the file name
@@ -483,7 +490,12 @@ vhdl-compiler-alist
 		      (integer :tag "Line subexp index")
 		      (choice  :tag "Column subexp    "
 			      (integer :tag "Index")
-			      (const :tag "No column number" nil)))
+			      (const :tag "No column number" nil))
+			    (choice  :tag "Type    "
+			      (const :tag "Info" 0)
+			      (const :tag "Warning" 1)
+			      (const :tag "Error" 2)
+			      (sexp :tag "(WARNING . INFO)")))
 		(list :tag "File message" :indent 4
 		      (regexp  :tag "Regexp           ")
 		      (integer :tag "File subexp index"))
@@ -2451,6 +2463,15 @@ vhdl-print-warnings
       (setq tmp-alist (cdr tmp-alist))))
   (customize-save-variable 'vhdl-compiler-alist vhdl-compiler-alist))
 
+;; option `vhdl-compiler-alist' changed format (3.38.1)
+(when (= (length (nth 11 (car vhdl-compiler-alist))) 4)
+  (let ((tmp-alist vhdl-compiler-alist))
+    (while tmp-alist
+      (setcdr (nthcdr 3 (nth 11 (car tmp-alist)))
+	      '(2 . nil))
+      (setq tmp-alist (cdr tmp-alist))))
+  (customize-save-variable 'vhdl-compiler-alist vhdl-compiler-alist))
+
 ;; option `vhdl-project': empty value changed from "" to nil (3.31.1)
 (when (equal vhdl-project "")
   (setq vhdl-project nil)

bug#63251: 28.2; vhdl-mode contribution

[Mattias Engdegård]

7 maj 2023 kl. 17.40 skrev Cyril Arnould <cyril.arnould@outlook.com>:

> I had tried (cons …) instead of (sexp …), but that just resulted in
> the customization menu breaking again if one of the compilers was set
> to a dotted list.

Why would they be set to a dotted list? Can you give an example?
I tried

			      (cons :tag "Warning and Info"
                                    (natnum :tag "Warning subexp index")
                                    (natnum :tag "Info subexp index   "))

instead of the (sexp ...) and it seems to work alright.

> > Think of what happens if later code performs an in-place change of that nil you added.
>  
> I am by no means an expert when it comes to elisp, I don’t know what
> kind of problems this could cause.

What I meant was that the code

  (let ((tmp-alist vhdl-compiler-alist))
    (while tmp-alist
      (setcdr (nthcdr 3 (nth 11 (car tmp-alist)))
	      '(2 . nil))
      (setq tmp-alist (cdr tmp-alist))))

modifies the existing list structure instead of creating a new one based on the old. This can lead to surprises if parts of the structure being mutated is shared with structure elsewhere. Now this code probably does work, but it's a bit brittle, and it takes some work for the reader to understand that it's OK. Contrast it to something like (untested!)

  (setq vhdl-compiler-alist
        (mapcar (lambda (entry)
                  ;; Add a `2' to the end of the list that is element #11.
                  (append (take 11 entry)
                          (append (nth 11 entry) (list 2))
                          (nthcdr 12 entry)))
                vhdl-compiler-alist))

where there is no mutation of the list structure, nor any sharing of a program constant whose accidental mutation might have very confusing consequences. (`take` is new in Emacs 29 but you can work around it by using `butlast` instead if the code needs to work with older Emacs versions.)

bug#63251: AW: bug#63251: 28.2; vhdl-mode contribution

[Cyril Arnould]

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> Why would they be set to a dotted list? Can you give an example?

Oh, sorry, I meant dotted pair, not list. So the (2 . 3) from the
ModelSim compiler entry, for example.

> I tried
>
>                               (cons :tag "Warning and Info"
>                                     (natnum :tag "Warning subexp index")
>                                     (natnum :tag "Info subexp index   "))
>
> instead of the (sexp ...) and it seems to work alright.

I agree, the above code seems to be the better option. I would
change the «Warning and Info» text though, seen as the
compilation command can differentiate between Warnings, Infos AND
Errors using the expression. Maybe «Type detection»? Or «Type
detection via regexp»?

> What I meant was that the code
>
>   (let ((tmp-alist vhdl-compiler-alist))
>     (while tmp-alist
>       (setcdr (nthcdr 3 (nth 11 (car tmp-alist)))
>               '(2 . nil))
>       (setq tmp-alist (cdr tmp-alist))))
>
> modifies the existing list structure instead of creating a new one based on the old. This can lead to surprises if parts of the structure being mutated is shared with structure elsewhere. Now this code probably does work, but it's a bit brittle, and it takes some work for the reader to understand that it's OK. Contrast it to something like (untested!)
>
>   (setq vhdl-compiler-alist
>         (mapcar (lambda (entry)
>                   ;; Add a `2' to the end of the list that is element #11.
>                   (append (take 11 entry)
>                           (append (nth 11 entry) (list 2))
>                           (nthcdr 12 entry)))
>                 vhdl-compiler-alist))
>
> where there is no mutation of the list structure, nor any sharing of a program constant whose accidental mutation might have very confusing consequences. (`take` is new in Emacs 29 but you can work around it by using `butlast` instead if the code needs to work with older Emacs versions.)

I have to admit this is going over my head a bit, but thanks for
explaining. I'll let it up to the maintainers to decide upon the
backwards compatibility code, I'm fine either way. Couldn't test
your changes though as I'm still on Emacs 28.2.


Von: Mattias Engdegård<mailto:mattias.engdegard@gmail.com>
Gesendet: Sonntag, 7. Mai 2023 18:22
An: Cyril Arnould<mailto:cyril.arnould@outlook.com>
Cc: 63251@debbugs.gnu.org<mailto:63251@debbugs.gnu.org>; Reto Zimmermann<mailto:reto@gnu.org>; Eli Zaretskii<mailto:eliz@gnu.org>
Betreff: Re: bug#63251: 28.2; vhdl-mode contribution

7 maj 2023 kl. 17.40 skrev Cyril Arnould <cyril.arnould@outlook.com>:

> I had tried (cons …) instead of (sexp …), but that just resulted in
> the customization menu breaking again if one of the compilers was set
> to a dotted list.

Why would they be set to a dotted list? Can you give an example?
I tried

                              (cons :tag "Warning and Info"
                                    (natnum :tag "Warning subexp index")
                                    (natnum :tag "Info subexp index   "))

instead of the (sexp ...) and it seems to work alright.

> > Think of what happens if later code performs an in-place change of that nil you added.
>
> I am by no means an expert when it comes to elisp, I don’t know what
> kind of problems this could cause.

What I meant was that the code

  (let ((tmp-alist vhdl-compiler-alist))
    (while tmp-alist
      (setcdr (nthcdr 3 (nth 11 (car tmp-alist)))
              '(2 . nil))
      (setq tmp-alist (cdr tmp-alist))))

modifies the existing list structure instead of creating a new one based on the old. This can lead to surprises if parts of the structure being mutated is shared with structure elsewhere. Now this code probably does work, but it's a bit brittle, and it takes some work for the reader to understand that it's OK. Contrast it to something like (untested!)

  (setq vhdl-compiler-alist
        (mapcar (lambda (entry)
                  ;; Add a `2' to the end of the list that is element #11.
                  (append (take 11 entry)
                          (append (nth 11 entry) (list 2))
                          (nthcdr 12 entry)))
                vhdl-compiler-alist))

where there is no mutation of the list structure, nor any sharing of a program constant whose accidental mutation might have very confusing consequences. (`take` is new in Emacs 29 but you can work around it by using `butlast` instead if the code needs to work with older Emacs versions.)



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bug#63251: 28.2; vhdl-mode contribution

[Mattias Engdegård]

7 maj 2023 kl. 19.48 skrev Cyril Arnould <cyril.arnould@outlook.com>:

> I would
> change the «Warning and Info» text though, seen as the
> compilation command can differentiate between Warnings, Infos AND
> Errors using the expression. Maybe «Type detection»? Or «Type
> detection via regexp»?

No opinion here.

> Couldn't test your changes though as I'm still on Emacs 28.2.

Replace (take 11 entry) with (butlast 3 entry) and it will work with any Emacs version.

bug#63251: AW: bug#63251: 28.2; vhdl-mode contribution

[Cyril Arnould]

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I ran into some issues, but got it to work with the following:

;; option `vhdl-compiler-alist' changed format (3.38.1)
(when (= (length (nth 11 (car vhdl-compiler-alist))) 4)
    (setq vhdl-compiler-alist
        (mapcar (lambda (entry)
                  ;; Add a `2' to the end of the list that is element #11.
                  (append (butlast entry 3)
                          (list (append (nth 11 entry) (list 2)))
                          (nthcdr 12 entry)))
                vhdl-compiler-alist))
  (customize-save-variable 'vhdl-compiler-alist vhdl-compiler-alist))


Von: Mattias Engdegård<mailto:mattias.engdegard@gmail.com>
Gesendet: Sonntag, 7. Mai 2023 19:53
An: Cyril Arnould<mailto:cyril.arnould@outlook.com>
Cc: 63251@debbugs.gnu.org<mailto:63251@debbugs.gnu.org>; Reto Zimmermann<mailto:reto@gnu.org>; Eli Zaretskii<mailto:eliz@gnu.org>
Betreff: Re: bug#63251: 28.2; vhdl-mode contribution

7 maj 2023 kl. 19.48 skrev Cyril Arnould <cyril.arnould@outlook.com>:

> I would
> change the «Warning and Info» text though, seen as the
> compilation command can differentiate between Warnings, Infos AND
> Errors using the expression. Maybe «Type detection»? Or «Type
> detection via regexp»?

No opinion here.

> Couldn't test your changes though as I'm still on Emacs 28.2.

Replace (take 11 entry) with (butlast 3 entry) and it will work with any Emacs version.


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bug#63251: 28.2; vhdl-mode contribution

[Mattias Engdegård]

7 maj 2023 kl. 20.56 skrev Cyril Arnould <cyril.arnould@outlook.com>:

> I ran into some issues, but got it to work with the following:

Cyril, you are already better than me at this!

bug#63251: AW: bug#63251: 28.2; vhdl-mode contribution

[Cyril Arnould]

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Following the discussion on the emacs-devel mailing list, here is
the updated patch based on the emacs-29 branch.

- Update vhdl-compiler definition and docstring to include the
  message type.

- Increment vhdl-version to 3.38.5 because of the above
  change. Skip several versions due to divergent development.

- Set the type of all other vhdl-compiler-alist entries to nil to
  explicitly declare them as error messages.

- Update the Xilinx Vivado compiler entry's library directory, it
  must end with '/'.

By defining the error message type to be nil rather than 2, we
can forego the backwards compatibility code.

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diff --git a/lisp/progmodes/vhdl-mode.el b/lisp/progmodes/vhdl-mode.el
index ee0ec63b6bc..77d862f1a17 100644
--- a/lisp/progmodes/vhdl-mode.el
+++ b/lisp/progmodes/vhdl-mode.el
@@ -16,7 +16,7 @@
 ;; Reto also said in Apr 2021 that he preferred to keep the XEmacs
 ;; compatibility code.
 
-(defconst vhdl-version "3.38.1"
+(defconst vhdl-version "3.38.5"
   "VHDL Mode version number.")
 
 (defconst vhdl-time-stamp "2015-03-12"
@@ -229,20 +229,20 @@ vhdl-compiler-alist
     ;; [Error] Assignment error: variable is illegal target of signal assignment
     ("ADVance MS" "vacom" "-work \\1" "make" "-f \\1"
      nil "valib \\1; vamap \\2 \\1" "./" "work/" "Makefile" "adms"
-     ("^\\s-+\\([0-9]+\\):\\s-+" nil 1 nil) ("^Compiling file \\(.+\\)" 1)
+     ("^\\s-+\\([0-9]+\\):\\s-+" nil 1 nil nil) ("^Compiling file \\(.+\\)" 1)
      ("ENTI/\\1.vif" "ARCH/\\1-\\2.vif" "CONF/\\1.vif"
       "PACK/\\1.vif" "BODY/\\1.vif" upcase))
     ;; Aldec
     ;; COMP96 ERROR COMP96_0018: "Identifier expected." "test.vhd" 66 3
     ("Aldec" "vcom" "-work \\1" "make" "-f \\1"
      nil "vlib \\1; vmap \\2 \\1" "./" "work/" "Makefile" "aldec"
-     ("^.* ERROR [^:]+: \".*\" \"\\([^ \t\n]+\\)\" \\([0-9]+\\) \\([0-9]+\\)" 1 2 3) ("" 0)
+     ("^.* ERROR [^:]+: \".*\" \"\\([^ \t\n]+\\)\" \\([0-9]+\\) \\([0-9]+\\)" 1 2 3 nil) ("" 0)
      nil)
     ;; Cadence Leapfrog: cv -file test.vhd
     ;; duluth: *E,430 (test.vhd,13): identifier (POSITIV) is not declared
     ("Cadence Leapfrog" "cv" "-work \\1 -file" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "leapfrog"
-     ("^duluth: \\*E,[0-9]+ (\\([^ \t\n]+\\),\\([0-9]+\\)):" 1 2 nil) ("" 0)
+     ("^duluth: \\*E,[0-9]+ (\\([^ \t\n]+\\),\\([0-9]+\\)):" 1 2 nil nil) ("" 0)
      ("\\1/entity" "\\2/\\1" "\\1/configuration"
       "\\1/package" "\\1/body" downcase))
     ;; Cadence Affirma NC vhdl: ncvhdl test.vhd
@@ -250,7 +250,7 @@ vhdl-compiler-alist
     ;; (PLL_400X_TOP) is not declared [10.3].
     ("Cadence NC" "ncvhdl" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ncvhdl"
-     ("^ncvhdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3) ("" 0)
+     ("^ncvhdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3 nil) ("" 0)
      ("\\1/entity/pc.db" "\\2/\\1/pc.db" "\\1/configuration/pc.db"
       "\\1/package/pc.db" "\\1/body/pc.db" downcase))
     ;; ghdl vhdl
@@ -258,21 +258,21 @@ vhdl-compiler-alist
     ;; bad_counter.vhdl:13:14: operator "=" is overloaded
     ("GHDL" "ghdl" "-i --workdir=\\1 --ieee=synopsys -fexplicit " "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ghdl"
-     ("^ghdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3) ("" 0)
+     ("^ghdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3 nil) ("" 0)
      ("\\1/entity" "\\2/\\1" "\\1/configuration"
       "\\1/package" "\\1/body" downcase))
     ;; IBM Compiler
     ;; 00 COACHDL* | [CCHDL-1]: File: adder.vhd, line.column: 120.6
     ("IBM Compiler" "g2tvc" "-src" "precomp" "\\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ibm"
-     ("^[0-9]+ COACHDL.*: File: \\([^ \t\n]+\\), *line.column: \\([0-9]+\\).\\([0-9]+\\)" 1 2 3) (" " 0)
+     ("^[0-9]+ COACHDL.*: File: \\([^ \t\n]+\\), *line.column: \\([0-9]+\\).\\([0-9]+\\)" 1 2 3 nil) (" " 0)
      nil)
     ;; Ikos Voyager: analyze test.vhd
     ;; analyze test.vhd
     ;; E L4/C5:        this library unit is inaccessible
     ("Ikos" "analyze" "-l \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "ikos"
-     ("^E L\\([0-9]+\\)/C\\([0-9]+\\):" nil 1 2)
+     ("^E L\\([0-9]+\\)/C\\([0-9]+\\):" nil 1 2 nil)
      ("^analyze +\\(.+ +\\)*\\(.+\\)$" 2)
      nil)
     ;; ModelSim, Model Technology: vcom test.vhd
@@ -294,7 +294,7 @@ vhdl-compiler-alist
     ;; test.vhd:34: error message
     ("LEDA ProVHDL" "provhdl" "-w \\1 -f" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "provhdl"
-     ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil) ("" 0)
+     ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil nil) ("" 0)
      ("ENTI/\\1.vif" "ARCH/\\1-\\2.vif" "CONF/\\1.vif"
       "PACK/\\1.vif" "BODY/BODY-\\1.vif" upcase))
     ;; Quartus compiler
@@ -305,21 +305,21 @@ vhdl-compiler-alist
     ;; Warning: VHDL Process Statement warning at dvi2sdi_tst.vhd(172): ...
     ("Quartus" "make" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "quartus"
-     ("^\\(Error\\|Warning\\): .* \\([^ \t\n]+\\)(\\([0-9]+\\))" 2 3 nil) ("" 0)
+     ("^\\(Error\\|Warning\\): .* \\([^ \t\n]+\\)(\\([0-9]+\\))" 2 3 nil nil) ("" 0)
      nil)
     ;; QuickHDL, Mentor Graphics: qvhcom test.vhd
     ;; ERROR: test.vhd(24): near "dnd": expecting: END
     ;; WARNING[4]: test.vhd(30): A space is required between ...
     ("QuickHDL" "qvhcom" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "quickhdl"
-     ("^\\(ERROR\\|WARNING\\)[^:]*: \\([^ \t\n]+\\)(\\([0-9]+\\)):" 2 3 nil) ("" 0)
+     ("^\\(ERROR\\|WARNING\\)[^:]*: \\([^ \t\n]+\\)(\\([0-9]+\\)):" 2 3 nil nil) ("" 0)
      ("\\1/_primary.dat" "\\2/\\1.dat" "\\1/_primary.dat"
       "\\1/_primary.dat" "\\1/body.dat" downcase))
     ;; Savant: scram -publish-cc test.vhd
     ;; test.vhd:87: _set_passed_through_out_port(IIR_Boolean) not defined for
     ("Savant" "scram" "-publish-cc -design-library-name \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work._savant_lib/" "Makefile" "savant"
-     ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil) ("" 0)
+     ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil nil) ("" 0)
      ("\\1_entity.vhdl" "\\2_secondary_units._savant_lib/\\2_\\1.vhdl"
       "\\1_config.vhdl" "\\1_package.vhdl"
       "\\1_secondary_units._savant_lib/\\1_package_body.vhdl" downcase))
@@ -327,39 +327,39 @@ vhdl-compiler-alist
     ;; Error: CSVHDL0002: test.vhd: (line 97): Invalid prefix
     ("Simili" "vhdlp" "-work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "simili"
-     ("^\\(Error\\|Warning\\): \\w+: \\([^ \t\n]+\\): (line \\([0-9]+\\)): " 2 3 nil) ("" 0)
+     ("^\\(Error\\|Warning\\): \\w+: \\([^ \t\n]+\\): (line \\([0-9]+\\)): " 2 3 nil nil) ("" 0)
      ("\\1/prim.var" "\\2/_\\1.var" "\\1/prim.var"
       "\\1/prim.var" "\\1/_body.var" downcase))
     ;; Speedwave (Innoveda): analyze -libfile vsslib.ini -src test.vhd
     ;;     ERROR[11]::File test.vhd Line 100: Use of undeclared identifier
     ("Speedwave" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "speedwave"
-     ("^ *ERROR\\[[0-9]+]::File \\([^ \t\n]+\\) Line \\([0-9]+\\):" 1 2 nil) ("" 0)
+     ("^ *ERROR\\[[0-9]+]::File \\([^ \t\n]+\\) Line \\([0-9]+\\):" 1 2 nil nil) ("" 0)
      nil)
     ;; Synopsys, VHDL Analyzer (sim): vhdlan -nc test.vhd
     ;; **Error: vhdlan,703 test.vhd(22): OTHERS is not legal in this context.
     ("Synopsys" "vhdlan" "-nc -work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "synopsys"
-     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil) ("" 0)
+     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil nil) ("" 0)
      ("\\1.sim" "\\2__\\1.sim" "\\1.sim" "\\1.sim" "\\1__.sim" upcase))
     ;; Synopsys, VHDL Analyzer (syn): vhdlan -nc -spc test.vhd
     ;; **Error: vhdlan,703 test.vhd(22): OTHERS is not legal in this context.
     ("Synopsys Design Compiler" "vhdlan" "-nc -spc -work \\1" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "synopsys_dc"
-     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil) ("" 0)
+     ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil nil) ("" 0)
      ("\\1.syn" "\\2__\\1.syn" "\\1.syn" "\\1.syn" "\\1__.syn" upcase))
     ;; Synplify:
     ;; @W:"test.vhd":57:8:57:9|Optimizing register bit count_x(5) to a constant 0
     ("Synplify" "n/a" "n/a" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "synplify"
-     ("^@[EWN]:\"\\([^ \t\n]+\\)\":\\([0-9]+\\):\\([0-9]+\\):" 1 2 3) ("" 0)
+     ("^@[EWN]:\"\\([^ \t\n]+\\)\":\\([0-9]+\\):\\([0-9]+\\):" 1 2 3 nil) ("" 0)
      nil)
     ;; Vantage: analyze -libfile vsslib.ini -src test.vhd
     ;;     Compiling "test.vhd" line 1...
     ;; **Error: LINE 49 *** No aggregate value is valid in this context.
     ("Vantage" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "vantage"
-     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil)
+     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil nil)
      ("^ *Compiling \"\\(.+\\)\" " 1)
      nil)
     ;; VeriBest: vc vhdl test.vhd
@@ -369,26 +369,26 @@ vhdl-compiler-alist
     ;; [Error] Name BITA is unknown
     ("VeriBest" "vc" "vhdl" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "veribest"
-     ("^ +\\([0-9]+\\): +[^ ]" nil 1 nil) ("" 0)
+     ("^ +\\([0-9]+\\): +[^ ]" nil 1 nil nil) ("" 0)
      nil)
     ;; Viewlogic: analyze -libfile vsslib.ini -src test.vhd
     ;;     Compiling "test.vhd" line 1...
     ;; **Error: LINE 49 *** No aggregate value is valid in this context.
     ("Viewlogic" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "viewlogic"
-     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil)
+     ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil nil)
      ("^ *Compiling \"\\(.+\\)\" " 1)
      nil)
     ;; Xilinx XST:
     ;; ERROR:HDLParsers:164 - "test.vhd" Line 3. parse error
     ("Xilinx XST" "xflow" "" "make" "-f \\1"
      nil "mkdir \\1" "./" "work/" "Makefile" "xilinx"
-     ("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil) ("" 0)
+     ("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil nil) ("" 0)
      nil)
     ;; Xilinx Vivado:
     ;; ERROR: [VRFC 10-1412] syntax error near o_idle [test.vhd:23]
     ("Xilinx Vivado" "xvhdl" "" "make" "-f \\1"
-     nil "mkdir \\1" "./" "work" "Makefile" "vivado"
+     nil "mkdir \\1" "./" "work/" "Makefile" "vivado"
      ("^\\(?:\\(?1:ERROR\\)\\|\\(?2:WARNING\\)\\|\\(?3:INFO\\)\\): \\(.+\\) \\[\\(?4:[^ \t\n]+\\):\\(?5:[0-9]+\\)\\]" 4 5 nil (2 . 3)) ("" 0)
      ("\\1/entity" "\\2/\\1" "\\1/configuration"
       "\\1/package" "\\1/body" downcase))
@@ -414,6 +414,13 @@ vhdl-compiler-alist
   File subexp index: index of subexpression that matches the file name
   Line subexp index: index of subexpression that matches the line number
   Column subexp idx: index of subexpression that matches the column number
+  Type subexp      : message type, can be nil for a real error, 1 for warning
+                     or 0 for info. Type can also be detected using the form
+                     (WARNING . INFO).  In that case this will be equivalent to
+                     1 if the WARNING’th subexpression matched or else
+                     equivalent to 0 if the INFO’th subexpression matched, or
+                     else equivalent to nil if neither of them matched. See
+                     also `compilation-error-regexp-alist'.
 File message:
   Regexp           : regular expression to match a file name message
   File subexp index: index of subexpression that matches the file name
@@ -483,7 +490,14 @@ vhdl-compiler-alist
 		      (integer :tag "Line subexp index")
 		      (choice  :tag "Column subexp    "
 			      (integer :tag "Index")
-			      (const :tag "No column number" nil)))
+			      (const :tag "No column number" nil))
+			    (choice  :tag "Type    "
+			      (const :tag "Info" 0)
+			      (const :tag "Warning" 1)
+			      (const :tag "Error" nil)
+			      (cons :tag "Type detection"
+			        (natnum :tag "Warning subexp index")
+			        (natnum :tag "Info subexp index   "))))
 		(list :tag "File message" :indent 4
 		      (regexp  :tag "Regexp           ")
 		      (integer :tag "File subexp index"))

bug#63251: 28.2; vhdl-mode contribution

[Mattias Engdegård]

9 maj 2023 kl. 18.16 skrev Cyril Arnould <cyril.arnould@outlook.com>:

> By defining the error message type to be nil rather than 2, we
> can forego the backwards compatibility code.
> <fix-vhdl-compiler-customization-4.patch>

Looks fine (although I had hoped to establish a precedent for less mutation in the updating code...).

Actually there is another argument to include updating code: subsequent changes will likely rely on existing values to conform strictly to the previous type and will likely botch any updating of values that don't.

For example, if yet another value is added to the entry, then it cannot just be appended to each entry because that entry might be too short because of the incomplete previous update.

bug#63251: AW: bug#63251: 28.2; vhdl-mode contribution

[Cyril Arnould]

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> subsequent changes will likely rely on existing values to conform strictly to the previous type and will likely botch any updating of values that don't.

I've thought about that, since compilation-error-regexp also
accepts HYPERLINK and HIGHLIGHT after TYPE. But if we were to
implement those in vhdl-mode, I'd say that nil should remain a
viable option for them as well, which is what they currently
default to.

If it does become a problem with future updates anyway, backward
compatibility code could still be implemented after the fact. I'd
prefer to leave it aside for now if it's not strictly necessary,
seen as it could bring more problems than it solves.


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bug#63251: 28.2; vhdl-mode contribution

[Mattias Engdegård]

9 maj 2023 kl. 19.11 skrev Cyril Arnould <cyril.arnould@outlook.com>:

> If it does become a problem with future updates anyway, backward
> compatibility code could still be implemented after the fact. I'd
> prefer to leave it aside for now if it's not strictly necessary,
> seen as it could bring more problems than it solves.

That's fine.