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| | From e39de9fa74e81b03c91377a3770d06df9933d645 Mon Sep 17 00:00:00 2001
From: Siddhesh Poyarekar <siddhesh@sourceware.org>
Date: Tue, 10 Oct 2017 15:44:39 +0530
Subject: [PATCH 50/90] memcpy_falkor: Fix code style in comments
diff --git a/ChangeLog b/ChangeLog
index 0ef88b0c87..e1e0cdd9b2 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,8 @@
2017-10-10 Siddhesh Poyarekar <siddhesh@sourceware.org>
+ * sysdeps/aarch64/multiarch/memcpy_falkor.S: Fix code style in
+ comments.
+
* manual/tunables.texi (Tunable glibc.tune.cpu): Add falkor.
* sysdeps/aarch64/multiarch/Makefile (sysdep_routines): Add
memcpy_falkor.
diff --git a/sysdeps/aarch64/multiarch/memcpy_falkor.S b/sysdeps/aarch64/multiarch/memcpy_falkor.S
index 3708281147..dea4f225ee 100644
--- a/sysdeps/aarch64/multiarch/memcpy_falkor.S
+++ b/sysdeps/aarch64/multiarch/memcpy_falkor.S
@@ -20,10 +20,8 @@
#include <sysdep.h>
/* Assumptions:
- *
- * ARMv8-a, AArch64, falkor, unaligned accesses.
- *
- */
+
+ ARMv8-a, AArch64, falkor, unaligned accesses. */
#define dstin x0
#define src x1
@@ -53,14 +51,13 @@
conditionals, since the former would unnecessarily break across multiple
issue groups. The medium copy group has been enlarged to 128 bytes since
bumping up the small copies up to 32 bytes allows us to do that without
- cost and also allows us the reduce the size of the prep code before loop64.
+ cost and also allows us to reduce the size of the prep code before loop64.
All copies are done only via two registers r6 and r7. This is to ensure
that all loads hit a single hardware prefetcher which can get correctly
trained to prefetch a single stream.
- The non-temporal stores help optimize cache utilization.
-*/
+ The non-temporal stores help optimize cache utilization. */
#if IS_IN (libc)
ENTRY_ALIGN (__memcpy_falkor, 6)
|