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* [PATCH 1/3] gnu: Add abc.
       [not found] <20160727170352.28973-1-dannym@scratchpost.org>
@ 2016-07-27 17:05 ` Danny Milosavljevic
  2016-07-27 17:06 ` [PATCH 2/3] gnu: Add iverilog Danny Milosavljevic
  2016-07-27 17:13 ` [PATCH 3/3] gnu: Add yosys Danny Milosavljevic
  2 siblings, 0 replies; 3+ messages in thread
From: Danny Milosavljevic @ 2016-07-27 17:05 UTC (permalink / raw)
  To: guix-devel

* gnu/packages/education.scm: New file.
* gnu/packages/fpga.scm (abc): New variable.
---
 gnu/local.mk          |  1 +
 gnu/packages/fpga.scm | 72 +++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 73 insertions(+)
 create mode 100644 gnu/packages/fpga.scm

diff --git a/gnu/local.mk b/gnu/local.mk
index 08770ff..38e5313 100644
--- a/gnu/local.mk
+++ b/gnu/local.mk
@@ -123,6 +123,7 @@ GNU_SYSTEM_MODULES =				\
   %D%/packages/fltk.scm				\
   %D%/packages/fonts.scm			\
   %D%/packages/fontutils.scm			\
+  %D%/packages/fpga.scm				\
   %D%/packages/freedesktop.scm			\
   %D%/packages/freeipmi.scm			\
   %D%/packages/ftp.scm				\
diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
new file mode 100644
index 0000000..40ea709
--- /dev/null
+++ b/gnu/packages/fpga.scm
@@ -0,0 +1,72 @@
+;;; GNU Guix --- Functional package management for GNU
+;;; Copyright © 2016 Danny Milosavljevic <dannym@scratchpost.org>
+;;;
+;;; This file is part of GNU Guix.
+;;;
+;;; GNU Guix is free software; you can redistribute it and/or modify it
+;;; under the terms of the GNU General Public License as published by
+;;; the Free Software Foundation; either version 3 of the License, or (at
+;;; your option) any later version.
+;;;
+;;; GNU Guix is distributed in the hope that it will be useful, but
+;;; WITHOUT ANY WARRANTY; without even the implied warranty of
+;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+;;; GNU General Public License for more details.
+;;;
+;;; You should have received a copy of the GNU General Public License
+;;; along with GNU Guix.  If not, see <http://www.gnu.org/licenses/>.
+
+(define-module (gnu packages fpga)
+  #:use-module ((guix licenses) #:prefix license:)
+  #:use-module (guix packages)
+  #:use-module (guix download)
+  #:use-module (guix build-system gnu)
+  #:use-module (guix build-system cmake)
+  #:use-module (gnu packages)
+  #:use-module (gnu packages pkg-config)
+  #:use-module (gnu packages tcl)
+  #:use-module (gnu packages readline)
+  #:use-module (gnu packages python)
+  #:use-module (gnu packages bison)
+  #:use-module (gnu packages flex)
+  #:use-module (gnu packages libffi)
+  #:use-module (gnu packages zip)
+  #:use-module (gnu packages perl)
+  #:use-module (gnu packages gawk))
+
+;; To compile as C code (default): make sure that CC=gcc and ABC_NAMESPACE is not defined.
+;; To compile as C++ code with namespaces: make sure that CC=g++ and ABC_NAMESPACE is set to the name of the requested namespace. For example, add -DABC_NAMESPACE=xxx to OPTFLAGS.
+(define-public abc
+  (package
+    (name "abc")
+    (version "0.0-5ae4b975c49c")
+    (source (origin
+              (method url-fetch)
+              (uri
+               (string-append "https://bitbucket.org/alanmi/abc/get/5ae4b975c49c.zip"))
+              (sha256
+                (base32
+                   "1syygi1x40rdryih3galr4q8yg1w5bvdzl75hd27v1xq0l5bz3d0"))))
+    (build-system gnu-build-system)
+    (native-inputs
+     `(("unzip" ,unzip)))
+    (inputs
+     `(("readline" ,readline)))
+    (arguments
+     `(#:tests? #f ; 'check target does not exist.
+       ; #:make-flags '("PROG=abc")
+       #:phases
+        (modify-phases %standard-phases
+          (delete 'configure)
+          (replace 'install
+            (lambda* (#:key outputs #:allow-other-keys)
+              (let* ((out (assoc-ref outputs "out"))
+                     (outbin (string-append out "/bin"))
+                     (target (string-append outbin "/abc")))
+                    (mkdir-p outbin)
+                    (copy-file "abc" target)))))))
+    (home-page "http://people.eecs.berkeley.edu/~alanmi/abc/")
+    (synopsis "Sequential Logic Synthesis and Formal Verification")
+    (description "ABC is a program for sequential logic synthesis and formal verification.")
+    (license license:expat) #| FIXME license: MIT Modern variant as described
+in <https://fedoraproject.org/wiki/Licensing:MIT> |#))

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH 2/3] gnu: Add iverilog.
       [not found] <20160727170352.28973-1-dannym@scratchpost.org>
  2016-07-27 17:05 ` [PATCH 1/3] gnu: Add abc Danny Milosavljevic
@ 2016-07-27 17:06 ` Danny Milosavljevic
  2016-07-27 17:13 ` [PATCH 3/3] gnu: Add yosys Danny Milosavljevic
  2 siblings, 0 replies; 3+ messages in thread
From: Danny Milosavljevic @ 2016-07-27 17:06 UTC (permalink / raw)
  To: guix-devel

* gnu/packages/fpga.scm (iverilog): New variable.
---
 gnu/packages/fpga.scm | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
index 40ea709..39a338e 100644
--- a/gnu/packages/fpga.scm
+++ b/gnu/packages/fpga.scm
@@ -32,6 +32,7 @@
   #:use-module (gnu packages libffi)
   #:use-module (gnu packages zip)
   #:use-module (gnu packages perl)
+  #:use-module (gnu packages ghostscript)
   #:use-module (gnu packages gawk))
 
 ;; To compile as C code (default): make sure that CC=gcc and ABC_NAMESPACE is not defined.
@@ -54,7 +55,6 @@
      `(("readline" ,readline)))
     (arguments
      `(#:tests? #f ; 'check target does not exist.
-       ; #:make-flags '("PROG=abc")
        #:phases
         (modify-phases %standard-phases
           (delete 'configure)
@@ -70,3 +70,29 @@
     (description "ABC is a program for sequential logic synthesis and formal verification.")
     (license license:expat) #| FIXME license: MIT Modern variant as described
 in <https://fedoraproject.org/wiki/Licensing:MIT> |#))
+
+;; Note: compare geda.
+(define-public iverilog
+  (package
+    (name "iverilog")
+    (version "10.1.1")
+    (source (origin
+              (method url-fetch)
+              (uri
+               (string-append "ftp://ftp.icarus.com/pub/eda/verilog/v10/verilog-" version ".tar.gz"))
+              (sha256
+                (base32
+                   "1nnassxvq30rnn0r2p85rkb2zwxk97p109y13x3vr365wzgpbapx"))))
+    (build-system gnu-build-system)
+    (native-inputs
+     `(("flex" ,flex)
+       ("bison" ,bison)
+       ("ghostscript" ,ghostscript) #| ps2pdf |#))
+    (home-page "http://iverilog.icarus.com/")
+    (synopsis "FPGA Verilog Simulation and Synthesis Tool")
+    (description "Icarus Verilog is a Verilog simulation and synthesis tool.
+It operates as a compiler, compiling source code written in Verilog (IEEE-1364) into some target format.
+For batch simulation, the compiler can generate an intermediate form called vvp assembly.
+This intermediate form is executed by the ``vvp'' command.
+For synthesis, the compiler generates netlists in the desired format.")
+    (license license:gpl2)))



-- 
W: https://www.friendly-machines.at/

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH 3/3] gnu: Add yosys.
       [not found] <20160727170352.28973-1-dannym@scratchpost.org>
  2016-07-27 17:05 ` [PATCH 1/3] gnu: Add abc Danny Milosavljevic
  2016-07-27 17:06 ` [PATCH 2/3] gnu: Add iverilog Danny Milosavljevic
@ 2016-07-27 17:13 ` Danny Milosavljevic
  2 siblings, 0 replies; 3+ messages in thread
From: Danny Milosavljevic @ 2016-07-27 17:13 UTC (permalink / raw)
  To: guix-devel

* gnu/packages/fpga.scm (yosys): New variable.
---
 gnu/packages/fpga.scm | 79 +++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 79 insertions(+)

diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
index 39a338e..143e644 100644
--- a/gnu/packages/fpga.scm
+++ b/gnu/packages/fpga.scm
@@ -96,3 +96,82 @@ For batch simulation, the compiler can generate an intermediate form called vvp
 This intermediate form is executed by the ``vvp'' command.
 For synthesis, the compiler generates netlists in the desired format.")
     (license license:gpl2)))
+
+(define-public yosys
+  (package
+    (name "yosys")
+    (version "0.6")
+    (source (origin
+              (method url-fetch)
+              (uri
+               (string-append "https://github.com/cliffordwolf/yosys/archive/"
+                              name "-" version ".tar.gz"))
+              (sha256
+                (base32
+                   "02j0c0m9dfyjccynalf0aggj6gy20k7iphpkg5cn6sdirlkv8gmx"))
+              (modules '((guix build utils)))
+              (snippet
+                '(substitute* "Makefile"
+                   (("ABCREV = .*") "ABCREV = default\n")))))
+    (build-system gnu-build-system)
+    (arguments
+     `(#:test-target "test"
+       #:make-flags (list (string-append "PREFIX=" %output))
+       #:phases
+       (modify-phases %standard-phases
+         (replace 'configure
+           (lambda* (#:key inputs (make-flags '()) #:allow-other-keys)
+             (zero? (apply system* "make" "config-gcc" make-flags))))
+         (add-after 'configure 'prepare-abc
+           (lambda* (#:key inputs #:allow-other-keys)
+             (let* ((sourceabc (assoc-ref inputs "abc"))
+                    (sourcebin (string-append sourceabc "/bin"))
+                    (source (string-append sourcebin "/abc")))
+                   (mkdir-p "abc")
+                   (call-with-output-file "abc/Makefile"
+                     (lambda (port)
+                       (format port ".PHONY: all\nall:\n\tcp -f abc abc-default\n")))
+                   (copy-file source "abc/abc")
+                   (zero? (system* "chmod" "+w" "abc/abc")))))
+          (add-before 'check 'fix-iverilog-references
+             (lambda* (#:key inputs native-inputs #:allow-other-keys)
+               (let* ((xinputs (or native-inputs inputs))
+                      (xdirname (assoc-ref xinputs "iverilog"))
+                      (iverilog (string-append xdirname "/bin/iverilog")))
+                     (substitute* '("./manual/CHAPTER_StateOfTheArt/synth.sh"
+                                    "./manual/CHAPTER_StateOfTheArt/validate_tb.sh"
+                                    "./techlibs/ice40/tests/test_bram.sh"
+                                    "./techlibs/ice40/tests/test_ffs.sh"
+                                    "./techlibs/xilinx/tests/bram1.sh"
+                                    "./techlibs/xilinx/tests/bram2.sh"
+                                    "./tests/bram/run-single.sh"
+                                    "./tests/realmath/run-test.sh"
+                                    "./tests/simple/run-test.sh"
+                                    "./tests/techmap/mem_simple_4x1_runtest.sh"
+                                    "./tests/tools/autotest.sh"
+                                    "./tests/vloghtb/common.sh")
+                        (("if ! which iverilog") "if ! true")
+                        (("iverilog ") (string-append iverilog " "))
+                        (("iverilog_bin=\".*\"") (string-append "iverilog_bin=\""
+                                                                iverilog
+                                                                "\"")))))))))
+    ;; TODO add xdot [patch the path to it here] as soon as I find out where it is.
+    (native-inputs
+     `(("pkg-config" ,pkg-config)
+       ("python" ,python)
+       ("bison" ,bison)
+       ("flex" ,flex)
+       ("gawk" , gawk) #| for the tests and "make" progress pretty-printing |#
+       ("tcl" ,tcl) ; tclsh for the tests
+       ("iverilog" ,iverilog) ; for the tests
+       ; FIXME provide "which"
+       #| ("perl" ,perl) |# #| for a few tests |#))
+    (inputs
+     `(("tcl" ,tcl)
+       ("readline" ,readline)
+       ("libffi" ,libffi)
+       ("abc" ,abc)))
+    (home-page "http://www.clifford.at/yosys/")
+    (synopsis "FPGA Verilog RTL Synthesizer")
+    (description "Yosys synthesizes Verilog-2005.")
+    (license license:isc)))

^ permalink raw reply related	[flat|nested] 3+ messages in thread

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Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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     [not found] <20160727170352.28973-1-dannym@scratchpost.org>
2016-07-27 17:05 ` [PATCH 1/3] gnu: Add abc Danny Milosavljevic
2016-07-27 17:06 ` [PATCH 2/3] gnu: Add iverilog Danny Milosavljevic
2016-07-27 17:13 ` [PATCH 3/3] gnu: Add yosys Danny Milosavljevic

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