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From: Michael Albinus <michael.albinus@gmx.de>
To: emacs-devel@gnu.org
Cc: Cyril Arnould <cyril.arnould@outlook.com>
Subject: Re: emacs-29 a2d4cd06f45: Improve VHDL mode highlighting
Date: Tue, 09 May 2023 09:53:21 +0200	[thread overview]
Message-ID: <87mt2e9c0e.fsf@gmx.de> (raw)
In-Reply-To: <20230505054533.D680AC1BECD@vcs2.savannah.gnu.org> (Eli Zaretskii's message of "Fri, 5 May 2023 01:45:33 -0400 (EDT)")

Eli Zaretskii <eliz@gnu.org> writes:

>     Improve VHDL mode highlighting
>     
>     * lisp/progmodes/vhdl-mode.el (vhdl-compiler-alist): Differentiate
>     between ModelSim errors, warnings, and notes when highlighting
>     them.  Add a new entry for Xilinx Vivado.  (Bug#63251)

It looks that this his added a new error in the tests. Try

--8<---------------cut here---------------start------------->8---
make -C test test-custom-opts
[...]
The following options might have problems:
variable: vhdl-compiler-alist
   value: (("ADVance MS" "vacom" "-work \\1" "make" "-f \\1" nil "valib \\1; vamap \\2 \\1" "./" "work/" "Makefile" "adms" ("^\\s-+\\([0-9]+\\):\\s-+" nil 1 nil) ("^Compiling file \\(.+\\)" 1) ("ENTI/\\1.vif" "ARCH/\\1-\\2.vif" "CONF/\\1.vif" "PACK/\\1.vif" "BODY/\\1.vif" upcase)) ("Aldec" "vcom" "-work \\1" "make" "-f \\1" nil "vlib \\1; vmap \\2 \\1" "./" "work/" "Makefile" "aldec" ("^.* ERROR [^:]+: \".*\" \"\\([^ 	
]+\\)\" \\([0-9]+\\) \\([0-9]+\\)" 1 2 3) ("" 0) nil) ("Cadence Leapfrog" "cv" "-work \\1 -file" "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "leapfrog" ("^duluth: \\*E,[0-9]+ (\\([^ 	
]+\\),\\([0-9]+\\)):" 1 2 nil) ("" 0) ("\\1/entity" "\\2/\\1" "\\1/configuration" "\\1/package" "\\1/body" downcase)) ("Cadence NC" "ncvhdl" "-work \\1" "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "ncvhdl" ("^ncvhdl_p: \\*E,\\w+ (\\([^ 	
]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3) ("" 0) ("\\1/entity/pc.db" "\\2/\\1/pc.db" "\\1/configuration/pc.db" "\\1/package/pc.db" "\\1/body/pc.db" downcase)) ("GHDL" "ghdl" "-i --workdir=\\1 --ieee=synopsys -fexplicit " "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "ghdl" ("^ghdl_p: \\*E,\\w+ (\\([^ 	
]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3) ("" 0) ("\\1/entity" "\\2/\\1" "\\1/configuration" "\\1/package" "\\1/body" downcase)) ("IBM Compiler" "g2tvc" "-src" "precomp" "\\1" nil "mkdir \\1" "./" "work/" "Makefile" "ibm" ("^[0-9]+ COACHDL.*: File: \\([^ 	
]+\\), *line.column: \\([0-9]+\\).\\([0-9]+\\)" 1 2 3) (" " 0) nil) ("Ikos" "analyze" "-l \\1" "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "ikos" ("^E L\\([0-9]+\\)/C\\([0-9]+\\):" nil 1 2) ("^analyze +\\(.+ +\\)*\\(.+\\)$" 2) nil) ("ModelSim" "vcom" "-93 -work \\1" "make" "-f \\1" nil "vlib \\1; vmap \\2 \\1" "./" "work/" "Makefile" "modelsim" ("^\\(?:\\(?1:ERROR\\|\\*\\* Error\\)\\|\\(?2:WARNING\\|\\*\\* Warning\\)\\|\\(?3:NOTE\\|\\*\\* Note\\)\\)[^:]*:\\( *\\[[0-9]+]\\| ([^)]+)\\)? \\(?4:[^ 	
]+\\)(\\(?5:[0-9]+\\)):" 4 5 nil (2 . 3)) ("" 0) ("\\1/_primary.dat" "\\2/\\1.dat" "\\1/_primary.dat" "\\1/_primary.dat" "\\1/body.dat" downcase)) ("LEDA ProVHDL" "provhdl" "-w \\1 -f" "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "provhdl" ("^\\([^ 	
:]+\\):\\([0-9]+\\): " 1 2 nil) ("" 0) ("ENTI/\\1.vif" "ARCH/\\1-\\2.vif" "CONF/\\1.vif" "PACK/\\1.vif" "BODY/BODY-\\1.vif" upcase)) ("Quartus" "make" "-work \\1" "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "quartus" ("^\\(Error\\|Warning\\): .* \\([^ 	
]+\\)(\\([0-9]+\\))" 2 3 nil) ("" 0) nil) ("QuickHDL" "qvhcom" "-work \\1" "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "quickhdl" ("^\\(ERROR\\|WARNING\\)[^:]*: \\([^ 	
]+\\)(\\([0-9]+\\)):" 2 3 nil) ("" 0) ("\\1/_primary.dat" "\\2/\\1.dat" "\\1/_primary.dat" "\\1/_primary.dat" "\\1/body.dat" downcase)) ("Savant" "scram" "-publish-cc -design-library-name \\1" "make" "-f \\1" nil "mkdir \\1" "./" "work._savant_lib/" "Makefile" "savant" ("^\\([^ 	
:]+\\):\\([0-9]+\\): " 1 2 nil) ("" 0) ("\\1_entity.vhdl" "\\2_secondary_units._savant_lib/\\2_\\1.vhdl" "\\1_config.vhdl" "\\1_package.vhdl" "\\1_secondary_units._savant_lib/\\1_package_body.vhdl" downcase)) ("Simili" "vhdlp" "-work \\1" "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "simili" ("^\\(Error\\|Warning\\): \\w+: \\([^ 	
]+\\): (line \\([0-9]+\\)): " 2 3 nil) ("" 0) ("\\1/prim.var" "\\2/_\\1.var" "\\1/prim.var" "\\1/prim.var" "\\1/_body.var" downcase)) ("Speedwave" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "speedwave" ("^ *ERROR\\[[0-9]+]::File \\([^ 	
]+\\) Line \\([0-9]+\\):" 1 2 nil) ("" 0) nil) ("Synopsys" "vhdlan" "-nc -work \\1" "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "synopsys" ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ 	
]+\\)(\\([0-9]+\\)):" 1 2 nil) ("" 0) ("\\1.sim" "\\2__\\1.sim" "\\1.sim" "\\1.sim" "\\1__.sim" upcase)) ("Synopsys Design Compiler" "vhdlan" "-nc -spc -work \\1" "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "synopsys_dc" ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ 	
]+\\)(\\([0-9]+\\)):" 1 2 nil) ("" 0) ("\\1.syn" "\\2__\\1.syn" "\\1.syn" "\\1.syn" "\\1__.syn" upcase)) ("Synplify" "n/a" "n/a" "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "synplify" ("^@[EWN]:\"\\([^ 	
]+\\)\":\\([0-9]+\\):\\([0-9]+\\):" 1 2 3) ("" 0) nil) ("Vantage" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "vantage" ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil) ("^ *Compiling \"\\(.+\\)\" " 1) nil) ("VeriBest" "vc" "vhdl" "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "veribest" ("^ +\\([0-9]+\\): +[^ ]" nil 1 nil) ("" 0) nil) ("Viewlogic" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "viewlogic" ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil) ("^ *Compiling \"\\(.+\\)\" " 1) nil) ("Xilinx XST" "xflow" "" "make" "-f \\1" nil "mkdir \\1" "./" "work/" "Makefile" "xilinx" ("^ERROR:HDLParsers:[0-9]+ - \"\\([^ 	
]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil) ("" 0) nil) ("Xilinx Vivado" "xvhdl" "" "make" "-f \\1" nil "mkdir \\1" "./" "work" "Makefile" "vivado" ("^\\(?:\\(?1:ERROR\\)\\|\\(?2:WARNING\\)\\|\\(?3:INFO\\)\\): \\(.+\\) \\[\\(?4:[^ 	
]+\\):\\(?5:[0-9]+\\)\\]" 4 5 nil (2 . 3)) ("" 0) ("\\1/entity" "\\2/\\1" "\\1/configuration" "\\1/package" "\\1/body" downcase)))
    type: (repeat (list :tag "Compiler" :indent 2 (string :tag "Compiler name      ") (string :tag "Compile command    ") (string :tag "Compile options    " "-work \\1") (string :tag "Make command       " "make") (string :tag "Make options       " "-f \\1") (choice :tag "Generate Makefile  " (const :tag "Built-in function" nil) (string :tag "Command" "vmake \\2 > \\1")) (string :tag "Library command    " "mkdir \\1") (directory :tag "Compile directory  " :validate vhdl-widget-directory-validate "./") (directory :tag "Library directory  " :validate vhdl-widget-directory-validate "work/") (file :tag "Makefile name      " "Makefile") (string :tag "ID string          ") (list :tag "Error message" :indent 4 (regexp :tag "Regexp           ") (choice :tag "File subexp      " (integer :tag "Index") (const :tag "No file name" nil)) (integer :tag "Line subexp index") (choice :tag "Column subexp    " (integer :tag "Index") (const :tag "No column number" nil))) (list :tag "File message" :indent 4 (regexp :tag "Regexp           ") (integer :tag "File subexp index")) (choice :tag "Unit-to-file name mapping" :format "%t: %[Value Menu%] %v
" (const :tag "Not defined" nil) (list :tag "To string" :indent 4 (string :tag "Entity           " "\\1.vhd") (string :tag "Architecture     " "\\2_\\1.vhd") (string :tag "Configuration    " "\\1.vhd") (string :tag "Package          " "\\1.vhd") (string :tag "Package Body     " "\\1_body.vhd") (choice :tag "Case adjustment  " (const :tag "None" identity) (const :tag "Upcase" upcase) (const :tag "Downcase" downcase))))))
--8<---------------cut here---------------end--------------->8---

Best regards, Michael.



       reply	other threads:[~2023-05-09  7:53 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <168326553347.14898.7329669431232347477@vcs2.savannah.gnu.org>
     [not found] ` <20230505054533.D680AC1BECD@vcs2.savannah.gnu.org>
2023-05-09  7:53   ` Michael Albinus [this message]
2023-05-09  8:16     ` emacs-29 a2d4cd06f45: Improve VHDL mode highlighting Eli Zaretskii
2023-05-09 11:51       ` AW: " Cyril Arnould
2023-05-09 14:37         ` Reto Zimmermann
2023-05-09 15:48           ` AW: " Cyril Arnould
2023-05-10  7:26             ` Cyril Arnould
2023-05-13 13:52               ` Eli Zaretskii

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