[bug#69581] [PATCH 00/11] CPU tuning patches

[bug#69581] [PATCH 00/11] CPU tuning patches

[Efraim Flashner]

This series corrects the remaining x86_64-v* to x86-64-v*, which is what
the compiler expects. It also removes x86-64-v1, which is the baseline,
and instead inserts x86-64. Software for i686 running on x86_64 can
still benefit from the tuning from x86_64, so I've added those options
for gcc.

I've added support for tuning rust packages, and I've marked rav1e as
tunable since it apparently shows a large boost when tuned to newer
hardware.  I've also added opus and libvorbis since they benefit
greatly, and syncthing since, beyond syncing, there is a lot of other
hashing and whatnot that it does that benefits from tuning.

I've updated the llvm micro-architecture list for x86_64, and I've added
for powerpc64le. I was going to add for aarch64 but it only supports
listing specific chips so that didn't fit with what we have elsewhere.

Efraim Flashner (11):
  gnu: opus: Mark as tunable.
  gnu: libvorbis: Mark as tunable.
  guix: cpu: Be consistent with x86_64 micro-architecture names.
  guix: cpu: Rename x86-64-v1 to x86-64.
  guix: cpu: Enable tuning for i686-linux.
  gnu: syncthing: Mark as tunable.
  gnu: rust: Add tuning information.
  transformations: Add support for rust.
  gnu: rav1e: Mark as tunable.
  gnu: clang-properties: Update x86_64 micro-architectures.
  gnu: clang-properties: Add micro-architecture support for powerpc64le.

 gnu/packages/gcc.scm       |   7 +-
 gnu/packages/golang.scm    |   3 +-
 gnu/packages/llvm.scm      | 127 +++++++++++++++++++------------------
 gnu/packages/rust.scm      |   4 +-
 gnu/packages/syncthing.scm |   3 +-
 gnu/packages/video.scm     |   1 +
 gnu/packages/xiph.scm      |   2 +
 guix/cpu.scm               |  24 +++----
 guix/transformations.scm   |   8 ++-
 9 files changed, 101 insertions(+), 78 deletions(-)


base-commit: f3ea06baca2b96cd20170616fd5da13ec2daac54
-- 
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[bug#69581] [PATCH 01/11] gnu: opus: Mark as tunable.

[Efraim Flashner]

* gnu/packages/xiph.scm (opus)[properties]: Mark package as tunable.

Change-Id: I5df964b5692c6f390eef55d780810b03d6a895dc
---
 gnu/packages/xiph.scm | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gnu/packages/xiph.scm b/gnu/packages/xiph.scm
index b47c718fb6..84b8ccb273 100644
--- a/gnu/packages/xiph.scm
+++ b/gnu/packages/xiph.scm
@@ -345,6 +345,7 @@ (define-public opus
 but is also intended for storage and streaming applications.  It is
 standardized by the Internet Engineering Task Force (IETF) as RFC 6716 which
 incorporated technology from Skype's SILK codec and Xiph.Org's CELT codec.")
+    (properties `((tunable? . #t)))
     (license license:bsd-3)
     (home-page "https://www.opus-codec.org")))
 
-- 
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[bug#69581] [PATCH 02/11] gnu: libvorbis: Mark as tunable.

[Efraim Flashner]

* gnu/packages/xiph.scm (libvorbis)[properties]: Mark package as tunable.

Change-Id: Ie378a8c671ba6408a137e3c27824cb17671cafe3
---
 gnu/packages/xiph.scm | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gnu/packages/xiph.scm b/gnu/packages/xiph.scm
index 84b8ccb273..4eff0a3877 100644
--- a/gnu/packages/xiph.scm
+++ b/gnu/packages/xiph.scm
@@ -97,6 +97,7 @@ (define-public libvorbis
 compressed audio format for mid to high quality (8kHz-48.0kHz, 16+ bit,
 polyphonic) audio and music at fixed and variable bitrates from 16 to
 128 kbps/channel.")
+   (properties `((tunable? . #t)))
    (license (license:non-copyleft "file://COPYING"
                                "See COPYING in the distribution."))
    (home-page "https://xiph.org/vorbis/")))
-- 
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[bug#69581] [PATCH 03/11] guix: cpu: Be consistent with x86_64 micro-architecture names.

[Efraim Flashner]

* gnu/packages/golang.scm (%go-1.18-x86_64-micro-architectures): Rename
micro-architectures from x86_64-v* to x86-64-v*.
* guix/cpu.scm (cpu->gcc-architecture): Return x86-64 as the fallback.
(cpu->micro-architecture-level): Rename micro-architectures from
x86_64-v* to x86-64-v*.
(gcc-architecture->micro-architecture-level): Same.

Change-Id: I37db65970417c22699ae8097b0361bccf76c1267
---
 gnu/packages/golang.scm |  2 +-
 guix/cpu.scm            | 20 ++++++++++----------
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/gnu/packages/golang.scm b/gnu/packages/golang.scm
index 0bcd231a93..d781cc6055 100644
--- a/gnu/packages/golang.scm
+++ b/gnu/packages/golang.scm
@@ -870,7 +870,7 @@ (define-public go-1.17
          ("powerpc64le" ,@%go-1.17-powerpc64le-micro-architectures))))))
 
 (define %go-1.18-x86_64-micro-architectures
-  (list "x86_64-v1" "x86_64-v2" "x86_64-v3" "x86_64-v4"))
+  (list "x86-64-v1" "x86-64-v2" "x86-64-v3" "x86-64-v4"))
 
 (define-public go-1.18
   (package
diff --git a/guix/cpu.scm b/guix/cpu.scm
index e80b74f161..b69c9b5360 100644
--- a/guix/cpu.scm
+++ b/guix/cpu.scm
@@ -200,7 +200,7 @@ (define (cpu->gcc-architecture cpu)
 
          ;; TODO: Recognize CENTAUR/CYRIX/NSC?
 
-         "x86_64")))
+         "x86-64")))
     ("aarch64"
      ;; Transcribed from GCC's list of aarch64 processors in aarch64-cores.def
      ;; What to do with big.LITTLE cores?
@@ -290,12 +290,12 @@ (define (cpu->micro-architecture-level cpu)
              ;; v2: CMPXCHG16B, LAHF, SAHF, POPCNT, SSE3, SSE4.1, SSE4.2, SSSE3
              ("avx512f" "avx512bw" "abx512cd" "abx512dq" "avx512vl"
               "avx" "avx2" "bmi1" "bmi2" "f16c" "fma" "movbe"
-              "popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86_64-v4")
+              "popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86-64-v4")
              ("avx" "avx2" "bmi1" "bmi2" "f16c" "fma" "movbe"
-              "popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86_64-v3")
-             ("popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86_64-v2")
-             (_ => "x86_64-v1")))
-         "x86_64-v1"))
+              "popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86-64-v3")
+             ("popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86-64-v2")
+             (_ => "x86-64-v1")))
+         "x86-64-v1"))
     (architecture
      ;; TODO: More architectures
      architecture)))
@@ -304,22 +304,22 @@ (define (gcc-architecture->micro-architecture-level gcc-architecture)
   "Return a matching psABI micro-architecture, allowing optimizations for x86_64
 CPUs for compilers which don't allow for more focused optimizing."
   ;; Matching gcc-architectures isn't an easy task, with the rule-of-thumb being
-  ;; AVX512F+ for x86_64-v4, AVX+ for x86_64-v3.
+  ;; AVX512F+ for x86-64-v4, AVX+ for x86-64-v3.
   ;; https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex
   (match gcc-architecture
     ((or "graniterapids-d" "graniterapids" "tigerlake" "sapphirerapids"
          "cooperlake" "icelake-server" "icelake-client" "cannonlake" "knm"
          "knl" "skylake-avx512"
          "znver4")
-     "x86_64-v4")
+     "x86-64-v4")
     ((or "pantherlake" "clearwaterforest" "arrowlake-s" "sierraforest"
          "alderlake" "skylake" "broadwell" "haswell"
          "znver3" "znver2" "znver1" "bdver4")
-     "x86_64-v3")
+     "x86-64-v3")
     ((or "sandybridge" "tremont" "goldmont-plus" "goldmont" "silvermont"
          "nehalem" "bonnell" "core2"
          "btver2" "athalon" "k8-sse3" "k8" "bdver3" "bdver2" "bdver1" "btver1"
          "amdfam10"
          "lujiazui" "yongfeng" "x86-64")
-     "x86_64-v1")
+     "x86-64-v1")
     (_ gcc-architecture)))
-- 
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[bug#69581] [PATCH 04/11] guix: cpu: Rename x86-64-v1 to x86-64.

[Efraim Flashner]

This is the actual micro-architecture designation used by compilers.

* gnu/packages/gcc.scm (%gcc-11-x86_64-micro-architectures): Rename
x86-64-v1 to x86-64.
* gnu/packages/golang.scm (%go-1.18-x86_64-micro-architectures): Same.
* guix/cpu.scm (cpu->micro-architecture-level): Same.
(gcc-architecture->micro-architecture-level): Same.

Change-Id: I19ed556a7e8deb4a77f4c63fca3b794f25092788
---
 gnu/packages/gcc.scm    | 2 +-
 gnu/packages/golang.scm | 3 ++-
 guix/cpu.scm            | 6 +++---
 3 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/gnu/packages/gcc.scm b/gnu/packages/gcc.scm
index 3abecdeadd..3555d12c44 100644
--- a/gnu/packages/gcc.scm
+++ b/gnu/packages/gcc.scm
@@ -624,7 +624,7 @@ (define %gcc-11-x86_64-micro-architectures
             "btver1" "btver2"                     ;AMD
 
             ;; psABI micro-architecture levels
-            "x86-64-v1" "x86-64-v2" "x86-64-v3" "x86-64-v4")))
+            "x86-64" "x86-64-v2" "x86-64-v3" "x86-64-v4")))
 
 ;; Suitable '-march' values for GCC 12.
 (define %gcc-12-aarch64-micro-architectures
diff --git a/gnu/packages/golang.scm b/gnu/packages/golang.scm
index d781cc6055..c4ae3a4673 100644
--- a/gnu/packages/golang.scm
+++ b/gnu/packages/golang.scm
@@ -870,7 +870,8 @@ (define-public go-1.17
          ("powerpc64le" ,@%go-1.17-powerpc64le-micro-architectures))))))
 
 (define %go-1.18-x86_64-micro-architectures
-  (list "x86-64-v1" "x86-64-v2" "x86-64-v3" "x86-64-v4"))
+  ;; GOAMD defaults to 'v1' so we match the default elsewhere.
+  (list "x86-64" "x86-64-v2" "x86-64-v3" "x86-64-v4"))
 
 (define-public go-1.18
   (package
diff --git a/guix/cpu.scm b/guix/cpu.scm
index b69c9b5360..6f9e8daa61 100644
--- a/guix/cpu.scm
+++ b/guix/cpu.scm
@@ -294,8 +294,8 @@ (define (cpu->micro-architecture-level cpu)
              ("avx" "avx2" "bmi1" "bmi2" "f16c" "fma" "movbe"
               "popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86-64-v3")
              ("popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86-64-v2")
-             (_ => "x86-64-v1")))
-         "x86-64-v1"))
+             (_ => "x86-64")))
+         "x86-64"))
     (architecture
      ;; TODO: More architectures
      architecture)))
@@ -321,5 +321,5 @@ (define (gcc-architecture->micro-architecture-level gcc-architecture)
          "btver2" "athalon" "k8-sse3" "k8" "bdver3" "bdver2" "bdver1" "btver1"
          "amdfam10"
          "lujiazui" "yongfeng" "x86-64")
-     "x86-64-v1")
+     "x86-64")
     (_ gcc-architecture)))
-- 
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[bug#69581] [PATCH 05/11] guix: cpu: Enable tuning for i686-linux.

[Efraim Flashner]

* gnu/packages/gcc.scm (gcc-7, gcc-10, gcc-11, gcc-12, gcc-13)
[properties]: In compiler-cpu-architectures use the
x86_64-micro-architectures list for i686.
* guix/cpu.scm (cpu->gcc-architecture): Expand the x86_64 case to also
support i686.

Change-Id: I0b820ceb715960db5e702814fa278dc8c619a836
---
 gnu/packages/gcc.scm | 5 +++++
 guix/cpu.scm         | 6 ++++--
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/gnu/packages/gcc.scm b/gnu/packages/gcc.scm
index 3555d12c44..c8902de6a0 100644
--- a/gnu/packages/gcc.scm
+++ b/gnu/packages/gcc.scm
@@ -673,6 +673,7 @@ (define-public gcc-7
      `((compiler-cpu-architectures
         ("aarch64" ,@%gcc-7.5-aarch64-micro-architectures)
         ("armhf" ,@%gcc-7.5-armhf-micro-architectures)
+        ("i686" ,@%gcc-7.5-x86_64-micro-architectures)
         ("x86_64" ,@%gcc-7.5-x86_64-micro-architectures))
        ,@(package-properties gcc-6)))))
 
@@ -729,6 +730,7 @@ (define-public gcc-10
     `((compiler-cpu-architectures
        ("aarch64" ,@%gcc-10-aarch64-micro-architectures)
        ("armhf" ,@%gcc-10-armhf-micro-architectures)
+       ("i686" ,@%gcc-10-x86_64-micro-architectures)
        ("x86_64" ,@%gcc-10-x86_64-micro-architectures))
       ,@(package-properties gcc-8)))))
 
@@ -764,6 +766,7 @@ (define-public gcc-11
     `((compiler-cpu-architectures
        ("aarch64" ,@%gcc-11-aarch64-micro-architectures)
        ("armhf" ,@%gcc-11-armhf-micro-architectures)
+       ("i686" ,@%gcc-11-x86_64-micro-architectures)
        ("x86_64" ,@%gcc-11-x86_64-micro-architectures))
       ,@(package-properties gcc-8)))))
 
@@ -786,6 +789,7 @@ (define-public gcc-12
     `((compiler-cpu-architectures
        ("aarch64" ,@%gcc-12-aarch64-micro-architectures)
        ("armhf" ,@%gcc-12-armhf-micro-architectures)
+       ("i686" ,@%gcc-12-x86_64-micro-architectures)
        ("x86_64" ,@%gcc-12-x86_64-micro-architectures))
       ,@(package-properties gcc-11)))))
 
@@ -808,6 +812,7 @@ (define-public gcc-13
      `((compiler-cpu-architectures
         ("aarch64" ,@%gcc-13-aarch64-micro-architectures)
         ("armhf" ,@%gcc-13-armhf-micro-architectures)
+        ("i686" ,@%gcc-13-x86_64-micro-architectures)
         ("x86_64" ,@%gcc-13-x86_64-micro-architectures))
        ,@(package-properties gcc-11)))))
 
diff --git a/guix/cpu.scm b/guix/cpu.scm
index 6f9e8daa61..840215cff0 100644
--- a/guix/cpu.scm
+++ b/guix/cpu.scm
@@ -113,7 +113,7 @@ (define (cpu->gcc-architecture cpu)
   "Return the architecture name, suitable for GCC's '-march' flag, that
 corresponds to CPU, a record as returned by 'current-cpu'."
   (match (cpu-architecture cpu)
-    ("x86_64"
+    ((or "x86_64" "i686")
      ;; Transcribed from GCC's 'host_detect_local_cpu' in driver-i386.cc.
      (letrec-syntax ((if-flags (syntax-rules (=>)
                                  ((_)
@@ -200,7 +200,9 @@ (define (cpu->gcc-architecture cpu)
 
          ;; TODO: Recognize CENTAUR/CYRIX/NSC?
 
-         "x86-64")))
+         (match (cpu-architecture cpu)
+           ("x86_64" "x86-64")
+           (_ "generic")))))
     ("aarch64"
      ;; Transcribed from GCC's list of aarch64 processors in aarch64-cores.def
      ;; What to do with big.LITTLE cores?
-- 
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[bug#69581] [PATCH 06/11] gnu: syncthing: Mark as tunable.

[Efraim Flashner]

* gnu/packages/syncthing.scm (syncthing)[properties]: Mark package as
tunable.

Change-Id: Ia885bbd32f043e83b231359cca438ea9caf4e8dc
---
 gnu/packages/syncthing.scm | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gnu/packages/syncthing.scm b/gnu/packages/syncthing.scm
index d09b03bcdb..6986642b73 100644
--- a/gnu/packages/syncthing.scm
+++ b/gnu/packages/syncthing.scm
@@ -129,7 +129,8 @@ (define-public syncthing
     (home-page "https://github.com/syncthing/syncthing")
     (properties
      '((release-monitoring-url . "https://syncthing.net/downloads/")
-       (upstream-name . "syncthing-source")))
+       (upstream-name . "syncthing-source")
+       (tunable? . #t)))
     (license mpl2.0)))
 
 (define-public syncthing-gtk
-- 
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[bug#69581] [PATCH 07/11] gnu: rust: Add tuning information.

[Efraim Flashner]

* gnu/packages/rust.scm (rust)[properties]: Add clang-properties
matching the input llvm package.

Change-Id: Ie2ef2387fff8aa639dcd73752bcaf3c26bbb376d
---
 gnu/packages/rust.scm | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/gnu/packages/rust.scm b/gnu/packages/rust.scm
index 1f129a93bd..68917ee5e8 100644
--- a/gnu/packages/rust.scm
+++ b/gnu/packages/rust.scm
@@ -964,7 +964,9 @@ (define-public rust
   (let ((base-rust rust-1.75))
     (package
       (inherit base-rust)
-      (properties (alist-delete 'hidden? (package-properties base-rust)))
+      (properties `(`(append
+                       ,(alist-delete 'hidden? (package-properties base-rust))
+                       ,@(clang-properties "15"))))
       (outputs (cons* "rust-src" "tools" (package-outputs base-rust)))
       (source
        (origin
-- 
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[bug#69581] [PATCH 08/11] transformations: Add support for rust.

[Efraim Flashner]

* guix/transformations.scm (tuning-compiler): Add support for rustc.

Change-Id: I6db596a586eda648666550cdcadaa5e1704cb79c
---
 guix/transformations.scm | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/guix/transformations.scm b/guix/transformations.scm
index 132ccd957a..f02b9f94d6 100644
--- a/guix/transformations.scm
+++ b/guix/transformations.scm
@@ -2,7 +2,7 @@
 ;;; Copyright © 2016-2023 Ludovic Courtès <ludo@gnu.org>
 ;;; Copyright © 2021 Marius Bakke <marius@gnu.org>
 ;;; Copyright © 2023 Sarthak Shah <shahsarthakw@gmail.com>
-;;; Copyright © 2023 Efraim Flashner <efraim@flashner.co.il>
+;;; Copyright © 2023, 2024 Efraim Flashner <efraim@flashner.co.il>
 ;;; Copyright © 2023 Ekaitz Zarraga <ekaitz@elenq.tech>
 ;;;
 ;;; This file is part of GNU Guix.
@@ -499,6 +499,10 @@ (define tuning-compiler
                                  "-Dcpu="
                                  (string-replace-substring
                                    #$micro-architecture "-" "_"))))
+                           ((and (search-next "rustc")
+                                 (string=? next (search-next "rustc")))
+                            (list "-C" (string-append "target_cpu="
+                                                      #$micro-architecture)))
                            (else
                              (list (string-append "-march="
                                                   #$micro-architecture))))))))))))
@@ -519,7 +523,7 @@ (define tuning-compiler
                                      (symlink #$program
                                               (string-append bin "/" program)))
                                    '("cc" "gcc" "clang" "g++" "c++" "clang++"
-                                     "go" "zig")))))))
+                                     "go" "rustc" "zig")))))))
 
 (define (build-system-with-tuning-compiler bs micro-architecture)
   "Return a variant of BS, a build system, that ensures that the compiler that
-- 
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[bug#69581] [PATCH 09/11] gnu: rav1e: Mark as tunable.

[Efraim Flashner]

* gnu/packages/video.scm (rav1e)[properties]: Mark package as tunable.

Change-Id: Icaf3615ce6f1e76416543a1285af5f1fdaec3589
---
 gnu/packages/video.scm | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gnu/packages/video.scm b/gnu/packages/video.scm
index 925f5ff83b..1b57c0fdd6 100644
--- a/gnu/packages/video.scm
+++ b/gnu/packages/video.scm
@@ -5948,6 +5948,7 @@ (define-public rav1e
     (description "@code{rav1e} is an AV1 video encoder.  It is designed to
 eventually cover all use cases, though in its current form it is most suitable
 for cases where libaom (the reference encoder) is too slow.")
+    (properties `((tunable? . #t)))
     (license license:bsd-2)))
 
 (define-public peek
-- 
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[bug#69581] [PATCH 10/11] gnu: clang-properties: Update x86_64 micro-architectures.

[Efraim Flashner]

* gnu/packages/llvm.scm (clang-properties): Add entries on x86_64 for
versions 17, 16, 15, 13, 9 and remove entry for version 10.

Change-Id: I93149c30f011c6de8ff0cc2c2b6f0186540359cd
---
 gnu/packages/llvm.scm | 122 +++++++++++++++++++++---------------------
 1 file changed, 61 insertions(+), 61 deletions(-)

diff --git a/gnu/packages/llvm.scm b/gnu/packages/llvm.scm
index 2778d0ec38..2567405cb4 100644
--- a/gnu/packages/llvm.scm
+++ b/gnu/packages/llvm.scm
@@ -482,67 +482,67 @@ (define* (clang-from-llvm llvm clang-runtime
 (define (clang-properties version)
   "Return package properties for Clang VERSION."
   `((compiler-cpu-architectures
-     ("x86_64"
-      ;; This list was obtained by running:
-      ;;
-      ;;   guix shell clang -- llc -march=x86-64 -mattr=help
-      ;;
-      ;; filtered from uninteresting entries such as "i686" and "pentium".
-      ,@(if (version>=? version "10.0")           ;TODO: refine
-            '("atom"
-              "barcelona"
-              "bdver1"
-              "bdver2"
-              "bdver3"
-              "bdver4"
-              "bonnell"
-              "broadwell"
-              "btver1"
-              "btver2"
-              "c3"
-              "c3-2"
-              "cannonlake"
-              "cascadelake"
-              "cooperlake"
-              "core-avx-i"
-              "core-avx2"
-              "core2"
-              "corei7"
-              "corei7-avx"
-              "generic"
-              "geode"
-              "goldmont"
-              "goldmont-plus"
-              "haswell"
-              "icelake-client"
-              "icelake-server"
-              "ivybridge"
-              "k8"
-              "k8-sse3"
-              "knl"
-              "knm"
-              "lakemont"
-              "nehalem"
-              "nocona"
-              "opteron"
-              "opteron-sse3"
-              "sandybridge"
-              "silvermont"
-              "skx"
-              "skylake"
-              "skylake-avx512"
-              "slm"
-              "tigerlake"
-              "tremont"
-              "westmere"
-              "x86-64"
-              "x86-64-v2"
-              "x86-64-v3"
-              "x86-64-v4"
-              "znver1"
-              "znver2"
-              "znver3")
-            '())))))
+      ("x86_64"
+       ;; This list was obtained from clang/test/Misc/target-invalid-cpu-note.c
+       ,@(cond
+           ((version>=? version "17.0")
+            '("nocona" "core2" "penryn" "bonnell" "atom" "silvermont" "slm"
+              "goldmont" "goldmont-plus" "tremont" "nehalem" "corei7" "westmere"
+              "sandybridge" "corei7-avx" "ivybridge" "core-avx-i" "haswell"
+              "core-avx2" "broadwell" "skylake" "skylake-avx512" "skx"
+              "cascadelake" "cooperlake" "cannonlake" "icelake-client"
+              "rocketlake" "icelake-server" "tigerlake" "sapphirerapids"
+              "alderlake" "raptorlake" "meteorlake" "sierraforest" "grandridge"
+              "graniterapids" "graniterapids-d" "emeraldrapids" "knl" "knm" "k8"
+              "athlon64" "athlon-fx" "opteron" "k8-sse3" "athlon64-sse3"
+              "opteron-sse3" "amdfam10" "barcelona" "btver1" "btver2" "bdver1"
+              "bdver2" "bdver3" "bdver4" "znver1" "znver2" "znver3" "znver4"
+              "x86-64" "x86-64-v2" "x86-64-v3" "x86-64-v4"))
+           ((version>=? version "16.0")
+            '("nocona" "core2" "penryn" "bonnell" "atom" "silvermont" "slm"
+              "goldmont" "goldmont-plus" "tremont" "nehalem" "corei7" "westmere"
+              "sandybridge" "corei7-avx" "ivybridge" "core-avx-i" "haswell"
+              "core-avx2" "broadwell" "skylake" "skylake-avx512" "skx"
+              "cascadelake" "cooperlake" "cannonlake" "icelake-client"
+              "rocketlake" "icelake-server" "tigerlake" "sapphirerapids"
+              "alderlake" "raptorlake" "meteorlake" "sierraforest" "grandridge"
+              "graniterapids" "emeraldrapids" "knl" "knm" "k8" "athlon64"
+              "athlon-fx" "opteron" "k8-sse3" "athlon64-sse3" "opteron-sse3"
+              "amdfam10" "barcelona" "btver1" "btver2" "bdver1" "bdver2"
+              "bdver3" "bdver4" "znver1" "znver2" "znver3" "znver4" "x86-64"
+              "x86-64-v2" "x86-64-v3" "x86-64-v4"))
+           ((version>=? version "15.0")
+            '("nocona" "core2" "penryn" "bonnell" "atom" "silvermont" "slm"
+              "goldmont" "goldmont-plus" "tremont" "nehalem" "corei7" "westmere"
+              "sandybridge" "corei7-avx" "ivybridge" "core-avx-i" "haswell"
+              "core-avx2" "broadwell" "skylake" "skylake-avx512" "skx"
+              "cascadelake" "cooperlake" "cannonlake" "icelake-client"
+              "rocketlake" "icelake-server" "tigerlake" "sapphirerapids"
+              "alderlake" "knl" "knm" "k8" "athlon64" "athlon-fx" "opteron"
+              "k8-sse3" "athlon64-sse3" "opteron-sse3" "amdfam10" "barcelona"
+              "btver1" "btver2" "bdver1" "bdver2" "bdver3" "bdver4" "znver1"
+              "znver2" "znver3" "x86-64" "x86-64-v2" "x86-64-v3" "x86-64-v4"))
+           ((version>=? version "13.0")
+            '("nocona" "core2" "penryn" "bonnell" "atom" "silvermont" "slm"
+              "goldmont" "goldmont-plus" "tremont" "nehalem" "corei7" "westmere"
+              "sandybridge" "corei7-avx" "ivybridge" "core-avx-i" "haswell"
+              "core-avx2" "broadwell" "skylake" "skylake-avx512" "skx"
+              "cascadelake" "cooperlake" "cannonlake" "icelake-client"
+              "rocketlake" "icelake-server" "tigerlake" "sapphirerapids"
+              "alderlake" "knl" "knm" "k8" "athlon64" "athlon-fx" "opteron"
+              "k8-sse3" "athlon64-sse3" "opteron-sse3" "amdfam10" "barcelona"
+              "btver1" "btver2" "bdver1" "bdver2" "bdver3" "bdver4" "znver1"
+              "znver2" "znver3" "x86-64" "x86-64-v2" "x86-64-v3" "x86-64-v4"))
+           ((version>=? version "9.0")
+            '("atom" "silvermont" "slm" "goldmont" "goldmont-plus" "tremont"
+              "nehalem" "corei7" "westmere" "sandybridge" "corei7-avx"
+              "ivybridge" "core-avx-i" "haswell" "core-avx2" "broadwell"
+              "skylake" "skylake-avx512" "skx" "cascadelake" "cooperlake"
+              "cannonlake" "icelake-client" "icelake-server" "knl" "knm" "k8"
+              "athlon64" "athlon-fx" "opteron" "k8-sse3" "athlon64-sse3"
+              "opteron-sse3" "amdfam10" "barcelona" "btver1" "btver2" "bdver1"
+              "bdver2" "bdver3" "bdver4" "znver1" "znver2" "x86-64"))
+           (else '()))))))
 
 (define-public (make-clang-toolchain clang libomp)
   (package
-- 
Efraim Flashner   <efraim@flashner.co.il>   רנשלפ םירפא
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[bug#69581] [PATCH 11/11] gnu: clang-properties: Add micro-architecture support for powerpc64le.

[Efraim Flashner]

* gnu/packages/llvm.scm (clang-properties): Add entry for powerpc64le.

Change-Id: I89f300922270a1f35aa08e73e62d90843bd902c8
---
 gnu/packages/llvm.scm | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/gnu/packages/llvm.scm b/gnu/packages/llvm.scm
index 2567405cb4..c002f62cac 100644
--- a/gnu/packages/llvm.scm
+++ b/gnu/packages/llvm.scm
@@ -482,6 +482,11 @@ (define* (clang-from-llvm llvm clang-runtime
 (define (clang-properties version)
   "Return package properties for Clang VERSION."
   `((compiler-cpu-architectures
+      ("powerpc64le"
+       ;; This list was obtained from clang/test/Misc/target-invalid-cpu-note.c
+       ;; and then trimmed down.
+       ,@(if (version>=? version "11.0")
+             '("power8" "power9" "power10" "powerpc64le")))
       ("x86_64"
        ;; This list was obtained from clang/test/Misc/target-invalid-cpu-note.c
        ,@(cond
-- 
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[bug#69581] [PATCH 01/11] gnu: opus: Mark as tunable.

[Ludovic Courtès]

Hello!

Efraim Flashner <efraim@flashner.co.il> skribis:

> * gnu/packages/xiph.scm (opus)[properties]: Mark package as tunable.
>
> Change-Id: I5df964b5692c6f390eef55d780810b03d6a895dc

[...]

> +    (properties `((tunable? . #t)))

It would be great if there could be a one-line comment above stating why
this makes sense, as is done for ‘eigen-benchmarks’ and ‘b2sum’, for
example.

Ludo’.

[bug#69581] [PATCH 03/11] guix: cpu: Be consistent with x86_64 micro-architecture names.

[Ludovic Courtès]

Efraim Flashner <efraim@flashner.co.il> skribis:

> * gnu/packages/golang.scm (%go-1.18-x86_64-micro-architectures): Rename
> micro-architectures from x86_64-v* to x86-64-v*.
> * guix/cpu.scm (cpu->gcc-architecture): Return x86-64 as the fallback.
> (cpu->micro-architecture-level): Rename micro-architectures from
> x86_64-v* to x86-64-v*.
> (gcc-architecture->micro-architecture-level): Same.
>
> Change-Id: I37db65970417c22699ae8097b0361bccf76c1267

LGTM.

Do I get it right that with the previous names, those procedures were
incorrect, because the underscore names are not recognized by GCC?

BTW, you can drop “guix:” from the first line of the commit log.

Ludo’.

[bug#69581] [PATCH 04/11] guix: cpu: Rename x86-64-v1 to x86-64.

[Ludovic Courtès]

Efraim Flashner <efraim@flashner.co.il> skribis:

> This is the actual micro-architecture designation used by compilers.
>
> * gnu/packages/gcc.scm (%gcc-11-x86_64-micro-architectures): Rename
> x86-64-v1 to x86-64.
> * gnu/packages/golang.scm (%go-1.18-x86_64-micro-architectures): Same.
> * guix/cpu.scm (cpu->micro-architecture-level): Same.
> (gcc-architecture->micro-architecture-level): Same.

LGTM!

[bug#69581] [PATCH 05/11] guix: cpu: Enable tuning for i686-linux.

[Ludovic Courtès]

Efraim Flashner <efraim@flashner.co.il> skribis:

> * gnu/packages/gcc.scm (gcc-7, gcc-10, gcc-11, gcc-12, gcc-13)
> [properties]: In compiler-cpu-architectures use the
> x86_64-micro-architectures list for i686.
> * guix/cpu.scm (cpu->gcc-architecture): Expand the x86_64 case to also
> support i686.

[...]

> +++ b/gnu/packages/gcc.scm
> @@ -673,6 +673,7 @@ (define-public gcc-7
>       `((compiler-cpu-architectures
>          ("aarch64" ,@%gcc-7.5-aarch64-micro-architectures)
>          ("armhf" ,@%gcc-7.5-armhf-micro-architectures)
> +        ("i686" ,@%gcc-7.5-x86_64-micro-architectures)
>          ("x86_64" ,@%gcc-7.5-x86_64-micro-architectures))

Wait, that wouldn’t work on an actual i686 CPU, right?

I was surprised to see that GCC built for i686 accepts those flags:

  guix shell -s i686-linux gcc-toolchain -- gcc -march=skylake /tmp/t.c
  guix shell -s i686-linux gcc-toolchain -- gcc -march=x86-64-v4 /tmp/t.c

If GCC agrees, so be it.  LGTM!

[bug#69581] [PATCH 06/11] gnu: syncthing: Mark as tunable.

[Ludovic Courtès]

Efraim Flashner <efraim@flashner.co.il> skribis:

> * gnu/packages/syncthing.scm (syncthing)[properties]: Mark package as
> tunable.

[...]

> +       (tunable? . #t)))

I’m skeptical; why would a backup program benefit from vector ISA
extensions?

Ludo’.

[bug#69581] [PATCH 07/11] gnu: rust: Add tuning information.

[Ludovic Courtès]

Efraim Flashner <efraim@flashner.co.il> skribis:

> * gnu/packages/rust.scm (rust)[properties]: Add clang-properties
> matching the input llvm package.
>
> Change-Id: Ie2ef2387fff8aa639dcd73752bcaf3c26bbb376d

Hmm rustc actually uses LLVM for code generation?  I’m a bit lost.
Anyway, if it supports those same flags as Clang, all good; maybe add a
comment to say so explicitly.

> +      (properties `(`(append
> +                       ,(alist-delete 'hidden? (package-properties base-rust))
> +                       ,@(clang-properties "15"))))

I think you meant:

  (properties (append (alist-delete 'hidden? (package-properties base-rust))
                      (clang-properties "15")))

Ludo’.

[bug#69581] [PATCH 07/11] gnu: rust: Add tuning information.

[Ludovic Courtès]

Efraim Flashner <efraim@flashner.co.il> skribis:

> +      (properties `(`(append
> +                       ,(alist-delete 'hidden? (package-properties base-rust))
> +                       ,@(clang-properties "15"))))

Just realized that we cannot really call ‘clang-properties’ from here
because ‘properties’ is not a thunked field, so this would lead to a
top-level circular dependency…  You might need to duplicate the info.

Thanks,
Ludo’.

[bug#69581] [PATCH 08/11] transformations: Add support for rust.

[Ludovic Courtès]

Efraim Flashner <efraim@flashner.co.il> skribis:

> * guix/transformations.scm (tuning-compiler): Add support for rustc.
>
> Change-Id: I6db596a586eda648666550cdcadaa5e1704cb79c

LGTM!

[bug#69581] [PATCH 10/11] gnu: clang-properties: Update x86_64 micro-architectures.

[Ludovic Courtès]

Efraim Flashner <efraim@flashner.co.il> skribis:

> * gnu/packages/llvm.scm (clang-properties): Add entries on x86_64 for
> versions 17, 16, 15, 13, 9 and remove entry for version 10.
>
> Change-Id: I93149c30f011c6de8ff0cc2c2b6f0186540359cd

[...]

> -      ;; This list was obtained by running:
> -      ;;
> -      ;;   guix shell clang -- llc -march=x86-64 -mattr=help
> -      ;;
> -      ;; filtered from uninteresting entries such as "i686" and "pentium".

[...]

> +      ("x86_64"
> +       ;; This list was obtained from clang/test/Misc/target-invalid-cpu-note.c

Does the ‘llc’ method no longer work?  It looked easier.

Apart from that, LGTM.

Ludo’.

[bug#69581] [PATCH 11/11] gnu: clang-properties: Add micro-architecture support for powerpc64le.

[Ludovic Courtès]

Efraim Flashner <efraim@flashner.co.il> skribis:

> * gnu/packages/llvm.scm (clang-properties): Add entry for powerpc64le.
>
> Change-Id: I89f300922270a1f35aa08e73e62d90843bd902c8

LGTM, thanks!

[bug#69581] [PATCH 05/11] guix: cpu: Enable tuning for i686-linux.

[Efraim Flashner]

[-- Attachment #1: Type: text/plain, Size: 1495 bytes --]

On Wed, Mar 06, 2024 at 07:05:03PM +0100, Ludovic Courtès wrote:
> Efraim Flashner <efraim@flashner.co.il> skribis:
> 
> > * gnu/packages/gcc.scm (gcc-7, gcc-10, gcc-11, gcc-12, gcc-13)
> > [properties]: In compiler-cpu-architectures use the
> > x86_64-micro-architectures list for i686.
> > * guix/cpu.scm (cpu->gcc-architecture): Expand the x86_64 case to also
> > support i686.
> 
> [...]
> 
> > +++ b/gnu/packages/gcc.scm
> > @@ -673,6 +673,7 @@ (define-public gcc-7
> >       `((compiler-cpu-architectures
> >          ("aarch64" ,@%gcc-7.5-aarch64-micro-architectures)
> >          ("armhf" ,@%gcc-7.5-armhf-micro-architectures)
> > +        ("i686" ,@%gcc-7.5-x86_64-micro-architectures)
> >          ("x86_64" ,@%gcc-7.5-x86_64-micro-architectures))
> 
> Wait, that wouldn’t work on an actual i686 CPU, right?
> 
> I was surprised to see that GCC built for i686 accepts those flags:
> 
>   guix shell -s i686-linux gcc-toolchain -- gcc -march=skylake /tmp/t.c
>   guix shell -s i686-linux gcc-toolchain -- gcc -march=x86-64-v4 /tmp/t.c
> 
> If GCC agrees, so be it.  LGTM!

I checked with `guix build foo --system=i686-linux --tune=znver2` and
everything just worked. That's definitely a Guix special, since we don't
have multilib support.

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[bug#69581] [PATCH 06/11] gnu: syncthing: Mark as tunable.

[Efraim Flashner]

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On Wed, Mar 06, 2024 at 07:06:04PM +0100, Ludovic Courtès wrote:
> Efraim Flashner <efraim@flashner.co.il> skribis:
> 
> > * gnu/packages/syncthing.scm (syncthing)[properties]: Mark package as
> > tunable.
> 
> [...]
> 
> > +       (tunable? . #t)))
> 
> I’m skeptical; why would a backup program benefit from vector ISA
> extensions?

There's a fair amount of hashing and other bits that happen in
syncthing, not just sending files over the network. IIRC when the GOAMD
support was added hashing was specifically shown to have a massive boost
from targeting newer micro-architectures.

Also this is the package I always end up enabling tuning on when
experimenting with tuning and go.

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[bug#69581] [PATCH 07/11] gnu: rust: Add tuning information.

[Efraim Flashner]

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On Wed, Mar 06, 2024 at 07:09:32PM +0100, Ludovic Courtès wrote:
> Efraim Flashner <efraim@flashner.co.il> skribis:
> 
> > * gnu/packages/rust.scm (rust)[properties]: Add clang-properties
> > matching the input llvm package.
> >
> > Change-Id: Ie2ef2387fff8aa639dcd73752bcaf3c26bbb376d
> 
> Hmm rustc actually uses LLVM for code generation?  I’m a bit lost.
> Anyway, if it supports those same flags as Clang, all good; maybe add a
> comment to say so explicitly.

It supports the same target_cpu targets as clang does. With llvm
switching to a monorepo they've apparently done a better job about
syncing the list between llvm and clang.

> > +      (properties `(`(append
> > +                       ,(alist-delete 'hidden? (package-properties base-rust))
> > +                       ,@(clang-properties "15"))))
> 
> I think you meant:
> 
>   (properties (append (alist-delete 'hidden? (package-properties base-rust))
>                       (clang-properties "15")))

I would love to have it cleaner like this.  There was a lot of trial and
error to end up with what I had above.  I'll try that.

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[bug#69581] [PATCH 07/11] gnu: rust: Add tuning information.

[Efraim Flashner]

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On Wed, Mar 06, 2024 at 07:10:54PM +0100, Ludovic Courtès wrote:
> Efraim Flashner <efraim@flashner.co.il> skribis:
> 
> > +      (properties `(`(append
> > +                       ,(alist-delete 'hidden? (package-properties base-rust))
> > +                       ,@(clang-properties "15"))))
> 
> Just realized that we cannot really call ‘clang-properties’ from here
> because ‘properties’ is not a thunked field, so this would lead to a
> top-level circular dependency…  You might need to duplicate the info.

We also use the list for zig.

Considering we're only supporting one version for rust duplicating the
information wouldn't be the worst thing but it'd be better to only have
it declared in one spot.

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[bug#69581] [PATCH 10/11] gnu: clang-properties: Update x86_64 micro-architectures.

[Efraim Flashner]

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On Wed, Mar 06, 2024 at 07:12:25PM +0100, Ludovic Courtès wrote:
> Efraim Flashner <efraim@flashner.co.il> skribis:
> 
> > * gnu/packages/llvm.scm (clang-properties): Add entries on x86_64 for
> > versions 17, 16, 15, 13, 9 and remove entry for version 10.
> >
> > Change-Id: I93149c30f011c6de8ff0cc2c2b6f0186540359cd
> 
> [...]
> 
> > -      ;; This list was obtained by running:
> > -      ;;
> > -      ;;   guix shell clang -- llc -march=x86-64 -mattr=help
> > -      ;;
> > -      ;; filtered from uninteresting entries such as "i686" and "pentium".
> 
> [...]
> 
> > +      ("x86_64"
> > +       ;; This list was obtained from clang/test/Misc/target-invalid-cpu-note.c
> 
> Does the ‘llc’ method no longer work?  It looked easier.
> 
> Apart from that, LGTM.

I've attached the file from llvmorg-15.0.7.  I found the file easier
since I didn't have to run the command from the shell and it listed all
the architectures I wouldn't have even thought of looking at.  And I
didn't have to do any filtering myself. And it's sorted by "power" and
by vendor, not alphabetically.


-- 
Efraim Flashner   <efraim@flashner.co.il>   רנשלפ םירפא
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[bug#69581] [PATCH 03/11] guix: cpu: Be consistent with x86_64 micro-architecture names.

[Efraim Flashner]

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On Wed, Mar 06, 2024 at 06:53:24PM +0100, Ludovic Courtès wrote:
> Efraim Flashner <efraim@flashner.co.il> skribis:
> 
> > * gnu/packages/golang.scm (%go-1.18-x86_64-micro-architectures): Rename
> > micro-architectures from x86_64-v* to x86-64-v*.
> > * guix/cpu.scm (cpu->gcc-architecture): Return x86-64 as the fallback.
> > (cpu->micro-architecture-level): Rename micro-architectures from
> > x86_64-v* to x86-64-v*.
> > (gcc-architecture->micro-architecture-level): Same.
> >
> > Change-Id: I37db65970417c22699ae8097b0361bccf76c1267
> 
> LGTM.
> 
> Do I get it right that with the previous names, those procedures were
> incorrect, because the underscore names are not recognized by GCC?
> 
> BTW, you can drop “guix:” from the first line of the commit log.

All our compilers expect a dash instead of an underscore, except for go
which doesn't care since we only need the v[234].

-- 
Efraim Flashner   <efraim@flashner.co.il>   רנשלפ םירפא
GPG key = A28B F40C 3E55 1372 662D  14F7 41AA E7DC CA3D 8351
Confidentiality cannot be guaranteed on emails sent or received unencrypted

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[bug#69581] [PATCH 10/11] gnu: clang-properties: Update x86_64 micro-architectures.

[Efraim Flashner]

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On Wed, Mar 06, 2024 at 07:12:25PM +0100, Ludovic Courtès wrote:
> Efraim Flashner <efraim@flashner.co.il> skribis:
> 
> > * gnu/packages/llvm.scm (clang-properties): Add entries on x86_64 for
> > versions 17, 16, 15, 13, 9 and remove entry for version 10.
> >
> > Change-Id: I93149c30f011c6de8ff0cc2c2b6f0186540359cd
> 
> [...]
> 
> > -      ;; This list was obtained by running:
> > -      ;;
> > -      ;;   guix shell clang -- llc -march=x86-64 -mattr=help
> > -      ;;
> > -      ;; filtered from uninteresting entries such as "i686" and "pentium".
> 
> [...]
> 
> > +      ("x86_64"
> > +       ;; This list was obtained from clang/test/Misc/target-invalid-cpu-note.c
> 
> Does the ‘llc’ method no longer work?  It looked easier.
> 
> Apart from that, LGTM.

Forgot to attach the file.

-- 
Efraim Flashner   <efraim@flashner.co.il>   רנשלפ םירפא
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[-- Attachment #1.2: target-invalid-cpu-note.c --]
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// Use CHECK-NEXT instead of multiple CHECK-SAME to ensure we will fail if there is anything extra in the output.
// RUN: not %clang_cc1 -triple armv5--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix ARM
// ARM: error: unknown target CPU 'not-a-cpu'
// ARM-NEXT: note: valid target CPU values are: arm8, arm810, strongarm, strongarm110, strongarm1100, strongarm1110, arm7tdmi, arm7tdmi-s, arm710t, arm720t, arm9, arm9tdmi, arm920, arm920t, arm922t, arm940t, ep9312, arm10tdmi, arm1020t, arm9e, arm946e-s, arm966e-s, arm968e-s, arm10e, arm1020e, arm1022e, arm926ej-s, arm1136j-s, arm1136jf-s, mpcore, mpcorenovfp, arm1176jz-s, arm1176jzf-s, arm1156t2-s, arm1156t2f-s, cortex-m0, cortex-m0plus, cortex-m1, sc000, cortex-a5, cortex-a7, cortex-a8, cortex-a9, cortex-a12, cortex-a15, cortex-a17, krait, cortex-r4, cortex-r4f, cortex-r5, cortex-r7, cortex-r8, cortex-r52, sc300, cortex-m3, cortex-m4, cortex-m7, cortex-m23, cortex-m33, cortex-m35p, cortex-m55, cortex-m85, cortex-a32, cortex-a35, cortex-a53, cortex-a55, cortex-a57, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78c, cortex-a710, cortex-x1, cortex-x1c, neoverse-n1, neoverse-n2, neoverse-v1, cyclone, exynos-m3, exynos-m4, exynos-m5, kryo, iwmmxt, xscale, swift{{$}}

// RUN: not %clang_cc1 -triple arm64--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix AARCH64
// AARCH64: error: unknown target CPU 'not-a-cpu'
// AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a57, cortex-a65, cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78c, cortex-a710, cortex-r82, cortex-x1, cortex-x1c, cortex-x2, neoverse-e1, neoverse-n1, neoverse-n2, neoverse-512tvb, neoverse-v1, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, apple-a12, apple-a13, apple-a14, apple-m1, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1{{$}}

// RUN: not %clang_cc1 -triple arm64--- -tune-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix TUNE_AARCH64
// TUNE_AARCH64: error: unknown target CPU 'not-a-cpu'
// TUNE_AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a57, cortex-a65, cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78c, cortex-a710, cortex-r82, cortex-x1, cortex-x1c, cortex-x2, neoverse-e1, neoverse-n1, neoverse-n2, neoverse-512tvb, neoverse-v1, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, apple-a12, apple-a13, apple-a14, apple-m1, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1{{$}}

// RUN: not %clang_cc1 -triple i386--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix X86
// X86: error: unknown target CPU 'not-a-cpu'
// X86-NEXT: note: valid target CPU values are: i386, i486, winchip-c6, winchip2, c3, i586, pentium, pentium-mmx, pentiumpro, i686, pentium2, pentium3, pentium3m, pentium-m, c3-2, yonah, pentium4, pentium4m, prescott, nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cooperlake, cannonlake, icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, knl, knm, lakemont, k6, k6-2, k6-3, athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3, x86-64, x86-64-v2, x86-64-v3, x86-64-v4, geode{{$}}

// RUN: not %clang_cc1 -triple x86_64--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix X86_64
// X86_64: error: unknown target CPU 'not-a-cpu'
// X86_64-NEXT: note: valid target CPU values are: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cooperlake, cannonlake, icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, knl, knm, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3, x86-64, x86-64-v2, x86-64-v3, x86-64-v4{{$}}

// RUN: not %clang_cc1 -triple i386--- -tune-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix TUNE_X86
// TUNE_X86: error: unknown target CPU 'not-a-cpu'
// TUNE_X86-NEXT: note: valid target CPU values are: i386, i486, winchip-c6, winchip2, c3, i586, pentium, pentium-mmx, pentiumpro, i686, pentium2, pentium3, pentium3m, pentium-m, c3-2, yonah, pentium4, pentium4m, prescott, nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cooperlake, cannonlake, icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, knl, knm, lakemont, k6, k6-2, k6-3, athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3, x86-64, geode{{$}}

// RUN: not %clang_cc1 -triple x86_64--- -tune-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix TUNE_X86_64
// TUNE_X86_64: error: unknown target CPU 'not-a-cpu'
// TUNE_X86_64-NEXT: note: valid target CPU values are: i386, i486, winchip-c6, winchip2, c3, i586, pentium, pentium-mmx, pentiumpro, i686, pentium2, pentium3, pentium3m, pentium-m, c3-2, yonah, pentium4, pentium4m, prescott, nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cooperlake, cannonlake, icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, knl, knm, lakemont, k6, k6-2, k6-3, athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3, x86-64, geode{{$}}

// RUN: not %clang_cc1 -triple nvptx--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix NVPTX
// NVPTX: error: unknown target CPU 'not-a-cpu'
// NVPTX-NEXT: note: valid target CPU values are: sm_20, sm_21, sm_30, sm_32, sm_35, sm_37, sm_50, sm_52, sm_53, sm_60, sm_61, sm_62, sm_70, sm_72, sm_75, sm_80, sm_86, gfx600, gfx601, gfx602, gfx700, gfx701, gfx702, gfx703, gfx704, gfx705, gfx801, gfx802, gfx803, gfx805, gfx810, gfx900, gfx902, gfx904, gfx906, gfx908, gfx909, gfx90a, gfx90c, gfx940, gfx1010, gfx1011, gfx1012, gfx1013, gfx1030, gfx1031, gfx1032, gfx1033, gfx1034, gfx1035, gfx1036, gfx1100, gfx1101, gfx1102, gfx1103{{$}}

// RUN: not %clang_cc1 -triple r600--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix R600
// R600: error: unknown target CPU 'not-a-cpu'
// R600-NEXT: note: valid target CPU values are: r600, rv630, rv635, r630, rs780, rs880, rv610, rv620, rv670, rv710, rv730, rv740, rv770, cedar, palm, cypress, hemlock, juniper, redwood, sumo, sumo2, barts, caicos, aruba, cayman, turks{{$}}

// RUN: not %clang_cc1 -triple amdgcn--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix AMDGCN
// AMDGCN: error: unknown target CPU 'not-a-cpu'
// AMDGCN-NEXT: note: valid target CPU values are: gfx600, tahiti, gfx601, pitcairn, verde, gfx602, hainan, oland, gfx700, kaveri, gfx701, hawaii, gfx702, gfx703, kabini, mullins, gfx704, bonaire, gfx705, gfx801, carrizo, gfx802, iceland, tonga, gfx803, fiji, polaris10, polaris11, gfx805, tongapro, gfx810, stoney, gfx900, gfx902, gfx904, gfx906, gfx908, gfx909, gfx90a, gfx90c, gfx940, gfx1010, gfx1011, gfx1012, gfx1013, gfx1030, gfx1031, gfx1032, gfx1033, gfx1034, gfx1035, gfx1036, gfx1100, gfx1101, gfx1102, gfx1103{{$}}

// RUN: not %clang_cc1 -triple wasm64--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix WEBASM
// WEBASM: error: unknown target CPU 'not-a-cpu'
// WEBASM-NEXT: note: valid target CPU values are: mvp, bleeding-edge, generic{{$}}

// RUN: not %clang_cc1 -triple systemz--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix SYSTEMZ
// SYSTEMZ: error: unknown target CPU 'not-a-cpu'
// SYSTEMZ-NEXT: note: valid target CPU values are: arch8, z10, arch9, z196, arch10, zEC12, arch11, z13, arch12, z14, arch13, z15, arch14, z16{{$}}

// RUN: not %clang_cc1 -triple sparc--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix SPARC
// SPARC: error: unknown target CPU 'not-a-cpu'
// SPARC-NEXT: note: valid target CPU values are: v8, supersparc, sparclite, f934, hypersparc, sparclite86x, sparclet, tsc701, v9, ultrasparc, ultrasparc3, niagara, niagara2, niagara3, niagara4, ma2100, ma2150, ma2155, ma2450, ma2455, ma2x5x, ma2080, ma2085, ma2480, ma2485, ma2x8x, myriad2, myriad2.1, myriad2.2, myriad2.3, leon2, at697e, at697f, leon3, ut699, gr712rc, leon4, gr740{{$}}

// RUN: not %clang_cc1 -triple sparcv9--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix SPARCV9
// SPARCV9: error: unknown target CPU 'not-a-cpu'
// SPARCV9-NEXT: note: valid target CPU values are: v9, ultrasparc, ultrasparc3, niagara, niagara2, niagara3, niagara4{{$}}

// RUN: not %clang_cc1 -triple powerpc--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix PPC
// PPC: error: unknown target CPU 'not-a-cpu'
// PPC-NEXT: note: valid target CPU values are: generic, 440, 450, 601, 602, 603, 603e, 603ev, 604, 604e, 620, 630, g3, 7400, g4, 7450, g4+, 750, 8548, 970, g5, a2, e500, e500mc, e5500, power3, pwr3, power4, pwr4, power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x, power7, pwr7, power8, pwr8, power9, pwr9, power10, pwr10, powerpc, ppc, ppc32, powerpc64, ppc64, powerpc64le, ppc64le, future{{$}}

// RUN: not %clang_cc1 -triple mips--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix MIPS
// MIPS: error: unknown target CPU 'not-a-cpu'
// MIPS-NEXT: note: valid target CPU values are: mips1, mips2, mips3, mips4, mips5, mips32, mips32r2, mips32r3, mips32r5, mips32r6, mips64, mips64r2, mips64r3, mips64r5, mips64r6, octeon, octeon+, p5600{{$}}

// RUN: not %clang_cc1 -triple lanai--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix LANAI
// LANAI: error: unknown target CPU 'not-a-cpu'
// LANAI-NEXT: note: valid target CPU values are: v11{{$}}

// RUN: not %clang_cc1 -triple hexagon--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix HEXAGON
// HEXAGON: error: unknown target CPU 'not-a-cpu'
// HEXAGON-NEXT: note: valid target CPU values are: hexagonv5, hexagonv55, hexagonv60, hexagonv62, hexagonv65, hexagonv66, hexagonv67, hexagonv67t, hexagonv68, hexagonv69{{$}}

// RUN: not %clang_cc1 -triple bpf--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix BPF
// BPF: error: unknown target CPU 'not-a-cpu'
// BPF-NEXT: note: valid target CPU values are: generic, v1, v2, v3, probe{{$}}

// RUN: not %clang_cc1 -triple avr--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix AVR
// AVR: error: unknown target CPU 'not-a-cpu'
// AVR-NEXT: note: valid target CPU values are: avr1, avr2, avr25, avr3, avr31, avr35, avr4, avr5, avr51, avr6, avrxmega1, avrxmega2, avrxmega3, avrxmega4, avrxmega5, avrxmega6, avrxmega7, avrtiny, at90s1200, attiny11, attiny12, attiny15, attiny28, at90s2313, at90s2323, at90s2333, at90s2343, attiny22, attiny26, at86rf401, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534, at90s8535, ata5272, ata6616c, attiny13, attiny13a, attiny2313, attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84, attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny441, attiny461, attiny461a, attiny841, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88, attiny828, at43usb355, at76c711, atmega103, at43usb320, attiny167, at90usb82, at90usb162, ata5505, ata6617c, ata664251, atmega8u2, atmega16u2, atmega32u2, attiny1634, atmega8, ata6289, atmega8a, ata6285, ata6286, ata6612c, atmega48, atmega48a, atmega48pa, atmega48pb, atmega48p, atmega88, atmega88a, atmega88p, atmega88pa, atmega88pb, atmega8515, atmega8535, atmega8hva, at90pwm1, at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81, ata5702m322, ata5782, ata5790, ata5790n, ata5791, ata5795, ata5831, ata6613c, ata6614q, ata8210, ata8510, atmega16, atmega16a, atmega161, atmega162, atmega163, atmega164a, atmega164p, atmega164pa, atmega165, atmega165a, atmega165p, atmega165pa, atmega168, atmega168a, atmega168p, atmega168pa, atmega168pb, atmega169, atmega169a, atmega169p, atmega169pa, atmega32, atmega32a, atmega323, atmega324a, atmega324p, atmega324pa, atmega324pb, atmega325, atmega325a, atmega325p, atmega325pa, atmega3250, atmega3250a, atmega3250p, atmega3250pa, atmega328, atmega328p, atmega328pb, atmega329, atmega329a, atmega329p, atmega329pa, atmega3290, atmega3290a, atmega3290p, atmega3290pa, atmega406, atmega64, atmega64a, atmega640, atmega644, atmega644a, atmega644p, atmega644pa, atmega645, atmega645a, atmega645p, atmega649, atmega649a, atmega649p, atmega6450, atmega6450a, atmega6450p, atmega6490, atmega6490a, atmega6490p, atmega64rfr2, atmega644rfr2, atmega16hva, atmega16hva2, atmega16hvb, atmega16hvbrevb, atmega32hvb, atmega32hvbrevb, atmega64hve, atmega64hve2, at90can32, at90can64, at90pwm161, at90pwm216, at90pwm316, atmega32c1, atmega64c1, atmega16m1, atmega32m1, atmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646, at90usb647, at90scr100, at94k, m3000, atmega128, atmega128a, atmega1280, atmega1281, atmega1284, atmega1284p, atmega128rfa1, atmega128rfr2, atmega1284rfr2, at90can128, at90usb1286, at90usb1287, atmega2560, atmega2561, atmega256rfr2, atmega2564rfr2, atxmega16a4, atxmega16a4u, atxmega16c4, atxmega16d4, atxmega32a4, atxmega32a4u, atxmega32c3, atxmega32c4, atxmega32d3, atxmega32d4, atxmega32e5, atxmega16e5, atxmega8e5, atxmega64a3, atxmega64a3u, atxmega64a4u, atxmega64b1, atxmega64b3, atxmega64c3, atxmega64d3, atxmega64d4, atxmega64a1, atxmega64a1u, atxmega128a3, atxmega128a3u, atxmega128b1, atxmega128b3, atxmega128c3, atxmega128d3, atxmega128d4, atxmega192a3, atxmega192a3u, atxmega192c3, atxmega192d3, atxmega256a3, atxmega256a3u, atxmega256a3b, atxmega256a3bu, atxmega256c3, atxmega256d3, atxmega384c3, atxmega384d3, atxmega128a1, atxmega128a1u, atxmega128a4u, attiny4, attiny5, attiny9, attiny10, attiny20, attiny40, attiny102, attiny104, attiny202, attiny402, attiny204, attiny404, attiny804, attiny1604, attiny406, attiny806, attiny1606, attiny807, attiny1607, attiny212, attiny412, attiny214, attiny414, attiny814, attiny1614, attiny416, attiny816, attiny1616, attiny3216, attiny417, attiny817, attiny1617, attiny3217, attiny1624, attiny1626, attiny1627, atmega808, atmega809, atmega1608, atmega1609, atmega3208, atmega3209, atmega4808, atmega4809

// RUN: not %clang_cc1 -triple riscv32 -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix RISCV32
// RISCV32: error: unknown target CPU 'not-a-cpu'
// RISCV32-NEXT: note: valid target CPU values are: generic-rv32, rocket-rv32, sifive-7-rv32, sifive-e20, sifive-e21, sifive-e24, sifive-e31, sifive-e34, sifive-e76{{$}}

// RUN: not %clang_cc1 -triple riscv64 -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix RISCV64
// RISCV64: error: unknown target CPU 'not-a-cpu'
// RISCV64-NEXT: note: valid target CPU values are: generic-rv64, rocket-rv64, sifive-7-rv64, sifive-s21, sifive-s51, sifive-s54, sifive-s76, sifive-u54, sifive-u74{{$}}

// RUN: not %clang_cc1 -triple riscv32 -tune-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix TUNE-RISCV32
// TUNE-RISCV32: error: unknown target CPU 'not-a-cpu'
// TUNE-RISCV32-NEXT: note: valid target CPU values are: generic-rv32, rocket-rv32, sifive-7-rv32, sifive-e20, sifive-e21, sifive-e24, sifive-e31, sifive-e34, sifive-e76, generic, rocket, sifive-7-series{{$}}

// RUN: not %clang_cc1 -triple riscv64 -tune-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix TUNE-RISCV64
// TUNE-RISCV64: error: unknown target CPU 'not-a-cpu'
// TUNE-RISCV64-NEXT: note: valid target CPU values are: generic-rv64, rocket-rv64, sifive-7-rv64, sifive-s21, sifive-s51, sifive-s54, sifive-s76, sifive-u54, sifive-u74, generic, rocket, sifive-7-series{{$}}

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[bug#69581] [PATCH 07/11] gnu: rust: Add tuning information.

[Ludovic Courtès]

Efraim Flashner <efraim@flashner.co.il> skribis:

> On Wed, Mar 06, 2024 at 07:10:54PM +0100, Ludovic Courtès wrote:
>> Efraim Flashner <efraim@flashner.co.il> skribis:
>> 
>> > +      (properties `(`(append
>> > +                       ,(alist-delete 'hidden? (package-properties base-rust))
>> > +                       ,@(clang-properties "15"))))
>> 
>> Just realized that we cannot really call ‘clang-properties’ from here
>> because ‘properties’ is not a thunked field, so this would lead to a
>> top-level circular dependency…  You might need to duplicate the info.
>
> We also use the list for zig.
>
> Considering we're only supporting one version for rust duplicating the
> information wouldn't be the worst thing but it'd be better to only have
> it declared in one spot.

Then it should be declared in a module that’s not in a cycle with its
users (that’s annoying!).  Maybe a separate ‘llvm-meta.scm’?

Ludo’.

[bug#69581] [PATCH 10/11] gnu: clang-properties: Update x86_64 micro-architectures.

[Ludovic Courtès]

Efraim Flashner <efraim@flashner.co.il> skribis:

> On Wed, Mar 06, 2024 at 07:12:25PM +0100, Ludovic Courtès wrote:
>> Efraim Flashner <efraim@flashner.co.il> skribis:
>> 
>> > * gnu/packages/llvm.scm (clang-properties): Add entries on x86_64 for
>> > versions 17, 16, 15, 13, 9 and remove entry for version 10.
>> >
>> > Change-Id: I93149c30f011c6de8ff0cc2c2b6f0186540359cd
>> 
>> [...]
>> 
>> > -      ;; This list was obtained by running:
>> > -      ;;
>> > -      ;;   guix shell clang -- llc -march=x86-64 -mattr=help
>> > -      ;;
>> > -      ;; filtered from uninteresting entries such as "i686" and "pentium".
>> 
>> [...]
>> 
>> > +      ("x86_64"
>> > +       ;; This list was obtained from clang/test/Misc/target-invalid-cpu-note.c
>> 
>> Does the ‘llc’ method no longer work?  It looked easier.
>> 
>> Apart from that, LGTM.
>
> I've attached the file from llvmorg-15.0.7.  I found the file easier
> since I didn't have to run the command from the shell and it listed all
> the architectures I wouldn't have even thought of looking at.  And I
> didn't have to do any filtering myself. And it's sorted by "power" and
> by vendor, not alphabetically.

I see.  It looks convenient but that’s a unit test: it’s not the “ground
truth” and it doesn’t have to match exactly what’s supported.  The ‘llc’
command is likely more faithful so I would keep it at least in the
comment.

Ludo’.

[bug#69581] [PATCH 07/11] gnu: rust: Add tuning information.

[Efraim Flashner]

[-- Attachment #1: Type: text/plain, Size: 1576 bytes --]

On Thu, Mar 07, 2024 at 10:38:06PM +0100, Ludovic Courtès wrote:
> Efraim Flashner <efraim@flashner.co.il> skribis:
> 
> > On Wed, Mar 06, 2024 at 07:10:54PM +0100, Ludovic Courtès wrote:
> >> Efraim Flashner <efraim@flashner.co.il> skribis:
> >> 
> >> > +      (properties `(`(append
> >> > +                       ,(alist-delete 'hidden? (package-properties base-rust))
> >> > +                       ,@(clang-properties "15"))))
> >> 
> >> Just realized that we cannot really call ‘clang-properties’ from here
> >> because ‘properties’ is not a thunked field, so this would lead to a
> >> top-level circular dependency…  You might need to duplicate the info.
> >
> > We also use the list for zig.
> >
> > Considering we're only supporting one version for rust duplicating the
> > information wouldn't be the worst thing but it'd be better to only have
> > it declared in one spot.
> 
> Then it should be declared in a module that’s not in a cycle with its
> users (that’s annoying!).  Maybe a separate ‘llvm-meta.scm’?

How about moving it into (guix cpu) together with the ones from gcc?
There are apparently some CPUs that are identical but have different
names that we could map together and would allow us to make any changes
to them in one place.  We've already pretty much done that with the
search paths.

-- 
Efraim Flashner   <efraim@flashner.co.il>   רנשלפ םירפא
GPG key = A28B F40C 3E55 1372 662D  14F7 41AA E7DC CA3D 8351
Confidentiality cannot be guaranteed on emails sent or received unencrypted

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[bug#69581] [PATCH 10/11] gnu: clang-properties: Update x86_64 micro-architectures.

[Efraim Flashner]

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On Thu, Mar 07, 2024 at 10:42:09PM +0100, Ludovic Courtès wrote:
> Efraim Flashner <efraim@flashner.co.il> skribis:
> 
> > On Wed, Mar 06, 2024 at 07:12:25PM +0100, Ludovic Courtès wrote:
> >> Efraim Flashner <efraim@flashner.co.il> skribis:
> >> 
> >> > * gnu/packages/llvm.scm (clang-properties): Add entries on x86_64 for
> >> > versions 17, 16, 15, 13, 9 and remove entry for version 10.
> >> >
> >> > Change-Id: I93149c30f011c6de8ff0cc2c2b6f0186540359cd
> >> 
> >> [...]
> >> 
> >> > -      ;; This list was obtained by running:
> >> > -      ;;
> >> > -      ;;   guix shell clang -- llc -march=x86-64 -mattr=help
> >> > -      ;;
> >> > -      ;; filtered from uninteresting entries such as "i686" and "pentium".
> >> 
> >> [...]
> >> 
> >> > +      ("x86_64"
> >> > +       ;; This list was obtained from clang/test/Misc/target-invalid-cpu-note.c
> >> 
> >> Does the ‘llc’ method no longer work?  It looked easier.
> >> 
> >> Apart from that, LGTM.
> >
> > I've attached the file from llvmorg-15.0.7.  I found the file easier
> > since I didn't have to run the command from the shell and it listed all
> > the architectures I wouldn't have even thought of looking at.  And I
> > didn't have to do any filtering myself. And it's sorted by "power" and
> > by vendor, not alphabetically.
> 
> I see.  It looks convenient but that’s a unit test: it’s not the “ground
> truth” and it doesn’t have to match exactly what’s supported.  The ‘llc’
> command is likely more faithful so I would keep it at least in the
> comment.

I'll keep the original comment and compare what I've added to what's
returned from the command. Then we also have an easy list to compare
against when removing uninteresting options from the output.

-- 
Efraim Flashner   <efraim@flashner.co.il>   רנשלפ םירפא
GPG key = A28B F40C 3E55 1372 662D  14F7 41AA E7DC CA3D 8351
Confidentiality cannot be guaranteed on emails sent or received unencrypted

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[bug#69581] [PATCH 07/11] gnu: rust: Add tuning information.

[Ludovic Courtès]

Hi,

Efraim Flashner <efraim@flashner.co.il> skribis:

> On Thu, Mar 07, 2024 at 10:38:06PM +0100, Ludovic Courtès wrote:

[...]

>> Then it should be declared in a module that’s not in a cycle with its
>> users (that’s annoying!).  Maybe a separate ‘llvm-meta.scm’?
>
> How about moving it into (guix cpu) together with the ones from gcc?
> There are apparently some CPUs that are identical but have different
> names that we could map together and would allow us to make any changes
> to them in one place.  We've already pretty much done that with the
> search paths.

To me, the whole point of the ‘compiler-cpu-architectures’ property is
that this info can be stored in the compiler package itself rather than
in some remote unrelated place (the same goes for search paths).  My
instinct would be to preserve that, hence the suggestion of a new (gnu
packages llvm-meta) or (… llvm-infra) module, something like that.

We should also keep in mind that those CPU names are those defined by
compilers themselves; they don’t have to match the vendor-chosen name or
the name chosen by some other compiler.

WDYT?  Does that make sense?

Ludo’.

[bug#69581] [PATCH 07/11] gnu: rust: Add tuning information.

[Efraim Flashner]

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On Fri, Mar 08, 2024 at 10:57:03PM +0100, Ludovic Courtès wrote:
> Hi,
> 
> Efraim Flashner <efraim@flashner.co.il> skribis:
> 
> > On Thu, Mar 07, 2024 at 10:38:06PM +0100, Ludovic Courtès wrote:
> 
> [...]
> 
> >> Then it should be declared in a module that’s not in a cycle with its
> >> users (that’s annoying!).  Maybe a separate ‘llvm-meta.scm’?
> >
> > How about moving it into (guix cpu) together with the ones from gcc?
> > There are apparently some CPUs that are identical but have different
> > names that we could map together and would allow us to make any changes
> > to them in one place.  We've already pretty much done that with the
> > search paths.
> 
> To me, the whole point of the ‘compiler-cpu-architectures’ property is
> that this info can be stored in the compiler package itself rather than
> in some remote unrelated place (the same goes for search paths).  My
> instinct would be to preserve that, hence the suggestion of a new (gnu
> packages llvm-meta) or (… llvm-infra) module, something like that.
> 
> We should also keep in mind that those CPU names are those defined by
> compilers themselves; they don’t have to match the vendor-chosen name or
> the name chosen by some other compiler.
> 
> WDYT?  Does that make sense?

That makes sense to me. I'm also going to look at moving
system->llvm-target to llvm-meta.  I think its used with dlang.scm and
maybe elsewhere, or could be used at least.  All these languages using
llvm as a backend means we keep on wanting to use these functions
elsewhere.

-- 
Efraim Flashner   <efraim@flashner.co.il>   רנשלפ םירפא
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Confidentiality cannot be guaranteed on emails sent or received unencrypted

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bug#69581: Acknowledgement ([PATCH 00/11] CPU tuning patches)

[Efraim Flashner]

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Patches pushed!

-- 
Efraim Flashner   <efraim@flashner.co.il>   רנשלפ םירפא
GPG key = A28B F40C 3E55 1372 662D  14F7 41AA E7DC CA3D 8351
Confidentiality cannot be guaranteed on emails sent or received unencrypted

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