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* [bug#73918] [PATCH v1 1/2] gnu: iverilog: Fix yosys tests
@ 2024-10-20 21:39 Jakob Kirsch via Guix-patches via
  2024-10-20 21:47 ` [bug#73918] [PATCH v2 " Jakob Kirsch via Guix-patches via
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Jakob Kirsch via Guix-patches via @ 2024-10-20 21:39 UTC (permalink / raw)
  To: 73918; +Cc: Jakob Kirsch

* gnu/packages/fpga.scm (iverilog): [inputs]: Add zlib.

Change-Id: I961bf73b17f96a5891232a8646bc04581dfb8bfc
---
 gnu/packages/fpga.scm | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
index 545ec3482d..153d17d1f3 100644
--- a/gnu/packages/fpga.scm
+++ b/gnu/packages/fpga.scm
@@ -125,6 +125,7 @@ (define-public iverilog
       #:make-flags #~(list (string-append "PREFIX="
                                           #$output))
       #:bootstrap-scripts #~(list "autoconf.sh")))
+    (inputs (list zlib))
     (native-inputs (list autoconf bison flex gperf))
     (home-page "https://steveicarus.github.io/iverilog")
     (synopsis "FPGA Verilog simulation and synthesis tool")

base-commit: 5703914e93d81ac6037240582abe899282e78f15
--
2.46.0





^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [bug#73918] [PATCH v2 1/2] gnu: iverilog: Fix yosys tests
  2024-10-20 21:39 [bug#73918] [PATCH v1 1/2] gnu: iverilog: Fix yosys tests Jakob Kirsch via Guix-patches via
@ 2024-10-20 21:47 ` Jakob Kirsch via Guix-patches via
  2024-10-20 21:48   ` [bug#73918] [PATCH v2 2/2] gnu: yosys: Update to 0.46 Jakob Kirsch via Guix-patches via
  2024-10-26 16:56 ` [bug#73918] [PATCH] " Denis 'GNUtoo' Carikli
  2024-10-31 16:38 ` Jakob Kirsch via Guix-patches via
  2 siblings, 1 reply; 5+ messages in thread
From: Jakob Kirsch via Guix-patches via @ 2024-10-20 21:47 UTC (permalink / raw)
  To: 73918; +Cc: Jakob Kirsch, Jakob Kirsch

* gnu/packages/fpga.scm (iverilog): [inputs]: Add zlib.

Change-Id: I961bf73b17f96a5891232a8646bc04581dfb8bfc
---
 gnu/packages/fpga.scm | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
index 545ec3482d..153d17d1f3 100644
--- a/gnu/packages/fpga.scm
+++ b/gnu/packages/fpga.scm
@@ -125,6 +125,7 @@ (define-public iverilog
       #:make-flags #~(list (string-append "PREFIX="
                                           #$output))
       #:bootstrap-scripts #~(list "autoconf.sh")))
+    (inputs (list zlib))
     (native-inputs (list autoconf bison flex gperf))
     (home-page "https://steveicarus.github.io/iverilog")
     (synopsis "FPGA Verilog simulation and synthesis tool")

base-commit: 5703914e93d81ac6037240582abe899282e78f15
--
2.46.0





^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [bug#73918] [PATCH v2 2/2] gnu: yosys: Update to 0.46.
  2024-10-20 21:47 ` [bug#73918] [PATCH v2 " Jakob Kirsch via Guix-patches via
@ 2024-10-20 21:48   ` Jakob Kirsch via Guix-patches via
  0 siblings, 0 replies; 5+ messages in thread
From: Jakob Kirsch via Guix-patches via @ 2024-10-20 21:48 UTC (permalink / raw)
  To: 73918; +Cc: Jakob Kirsch, Jakob Kirsch

* gnu/packages/fpga.scm (yosys): Update to 0.46.

Change-Id: Ibdd4c02155ace62bf50ff9b7bb605edc21698c2a
---
 gnu/packages/fpga.scm | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
index 153d17d1f3..83e81bfc50 100644
--- a/gnu/packages/fpga.scm
+++ b/gnu/packages/fpga.scm
@@ -8,6 +8,7 @@
 ;;; Copyright © 2022 Christian Gelinek <cgelinek@radlogic.com.au>
 ;;; Copyright © 2022 jgart <jgart@dismail.de>
 ;;; Copyright © 2024 Efraim Flashner <efraim@flashner.co.il>
+;;; Copyright © 2024 Jakob Kirsch <jakob.kirsch@web.de>
 ;;;
 ;;; This file is part of GNU Guix.
 ;;;
@@ -149,15 +150,15 @@ (define-public iverilog
 (define-public yosys
   (package
     (name "yosys")
-    (version "0.26")
+    (version "0.46")
     (source (origin
               (method git-fetch)
               (uri (git-reference
                     (url "https://github.com/YosysHQ/yosys")
-                    (commit (string-append "yosys-" version))))
+                    (commit version)))
               (sha256
                (base32
-                "0s79ljgbcfkm7l9km7dcvlz4mnx38nbyxppscvh5il5lw07n45gx"))
+                "1zj7vbpy6v1wn4p5cjs4hdjd467a1j1aj2qhs148bl2s6mzq3p86"))
               (file-name (git-file-name name version))))
     (build-system gnu-build-system)
     (arguments
--
2.46.0





^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [bug#73918] [PATCH] gnu: yosys: Update to 0.46.
  2024-10-20 21:39 [bug#73918] [PATCH v1 1/2] gnu: iverilog: Fix yosys tests Jakob Kirsch via Guix-patches via
  2024-10-20 21:47 ` [bug#73918] [PATCH v2 " Jakob Kirsch via Guix-patches via
@ 2024-10-26 16:56 ` Denis 'GNUtoo' Carikli
  2024-10-31 16:38 ` Jakob Kirsch via Guix-patches via
  2 siblings, 0 replies; 5+ messages in thread
From: Denis 'GNUtoo' Carikli @ 2024-10-26 16:56 UTC (permalink / raw)
  To: 73918

[-- Attachment #1: Type: text/plain, Size: 704 bytes --]

Hi,

Thanks a lot for the patches. 

Note that I'm not a Guix committer nor maintainer.

Also I'm not familiar with best practice for commit messages within the
Guix projects but other projects that care a lot about code quality
tend to indicate the commit that broke something in the commit message.

For instance in Linux we have commits like that:
> This was broken by commit 16aac5ad1fa9 ("ovl: support encoding
> non-decodable file handles"), which didn't take the lower-only
> configuration into account.

That would simplify the review as here a reviewer will probably need to
look into what broke yosys to verify if your fix is the best possible
fix (it probably is).

Denis.

[-- Attachment #2: OpenPGP digital signature --]
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^ permalink raw reply	[flat|nested] 5+ messages in thread

* [bug#73918] [PATCH] gnu: yosys: Update to 0.46.
  2024-10-20 21:39 [bug#73918] [PATCH v1 1/2] gnu: iverilog: Fix yosys tests Jakob Kirsch via Guix-patches via
  2024-10-20 21:47 ` [bug#73918] [PATCH v2 " Jakob Kirsch via Guix-patches via
  2024-10-26 16:56 ` [bug#73918] [PATCH] " Denis 'GNUtoo' Carikli
@ 2024-10-31 16:38 ` Jakob Kirsch via Guix-patches via
  2 siblings, 0 replies; 5+ messages in thread
From: Jakob Kirsch via Guix-patches via @ 2024-10-31 16:38 UTC (permalink / raw)
  To: 73918

Thank you for the feedback, the commit that broke yosys was b32f8bc9da74158330cebdbcb481d41e1be6d1ce when iverilog was updated to 12.0

iverilog needs zlib as an input for a feature that yosys requires.

I fixed that with the one patch and also updated yosys in the process because it's kinda outdated.




^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2024-10-31 16:39 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-10-20 21:39 [bug#73918] [PATCH v1 1/2] gnu: iverilog: Fix yosys tests Jakob Kirsch via Guix-patches via
2024-10-20 21:47 ` [bug#73918] [PATCH v2 " Jakob Kirsch via Guix-patches via
2024-10-20 21:48   ` [bug#73918] [PATCH v2 2/2] gnu: yosys: Update to 0.46 Jakob Kirsch via Guix-patches via
2024-10-26 16:56 ` [bug#73918] [PATCH] " Denis 'GNUtoo' Carikli
2024-10-31 16:38 ` Jakob Kirsch via Guix-patches via

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