From: "Ludovic Courtès" <ludo@gnu.org>
To: Gabriel Wicki <gabriel@erlikon.ch>
Cc: 57291-done@debbugs.gnu.org
Subject: bug#57291: New package: fftgen
Date: Fri, 02 Sep 2022 17:29:49 +0200 [thread overview]
Message-ID: <87zgfhu74i.fsf@gnu.org> (raw)
In-Reply-To: <20220818231841.vncyowy57s2awb74@silvi> (Gabriel Wicki's message of "Fri, 19 Aug 2022 01:18:41 +0200")
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Hi,
Gabriel Wicki <gabriel@erlikon.ch> skribis:
>>From 189ae40cb6104ac703f0171e32fe88208f9fcc25 Mon Sep 17 00:00:00 2001
> From: Gabriel Wicki <gabriel@erlikon.ch>
> Date: Fri, 19 Aug 2022 01:14:06 +0200
> Subject: [PATCH] gnu: Add fftgen.
>
> * gnu/packages/fpga.scm (fftgen): New variable.
Applied with the minor changes below, thanks!
Ludo’.
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diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
index e1ae577c65..58b81bf83a 100644
--- a/gnu/packages/fpga.scm
+++ b/gnu/packages/fpga.scm
@@ -554,7 +554,7 @@ (define-public verilator
(license license:lgpl3)))
(define-public fftgen
- (let ((commit "1d75a992efd0528edea128a903aafdabe133cb08")
+ (let ((commit "1d75a992efd0528edea128a903aafdabe133cb08") ;no releases
(revision "0"))
(package
(name "fftgen")
@@ -564,22 +564,23 @@ (define-public fftgen
(uri (git-reference
(url "https://github.com/ZipCPU/dblclockfft")
(commit commit)))
- (file-name (git-file-name name
- (string-take commit 8)))
+ (file-name (git-file-name name version))
(sha256
(base32
"0qq874yalzpjdwnxhc5df8a0ifywv29wcncb09945x56xplvkcmd"))))
(build-system gnu-build-system)
(arguments
- `(#:tests? #f
+ `(#:tests? #f ;no tests
+ #:make-flags '("CFLAGS=-g -O2") ;default flags lack -O2
#:phases (modify-phases %standard-phases
(delete 'configure)
(replace 'install
(lambda* (#:key outputs #:allow-other-keys)
(let ((bin (string-append (assoc-ref outputs "out")
"/bin")))
- (install-file "sw/fftgen" bin) #t))))))
- (synopsis "Generic Pipelined FFT Core Generator")
- (description "fftgen produces FFT hardware designs in Verilog.")
+ (install-file "sw/fftgen" bin)))))))
+ (synopsis "Generic pipelined FFT core generator")
+ (description "fftgen produces @acronym{FFT, fast-Fourier transforms}
+hardware designs in Verilog.")
(home-page "https://zipcpu.com/")
- (license license:lgpl3))))
+ (license license:lgpl3+))))
next prev parent reply other threads:[~2022-09-02 15:30 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-18 23:18 [bug#57291] New package: fftgen Gabriel Wicki
2022-09-02 15:29 ` Ludovic Courtès [this message]
2022-09-02 19:00 ` Maxime Devos
2022-09-02 18:57 ` Maxime Devos
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