* [PATCH 0/3] gnu: Add gdb-arm-none-eabi and openocd.
@ 2016-10-25 13:26 Theodoros Foradis
2016-10-25 13:26 ` [PATCH 1/3] gnu: Add gdb-arm-none-eabi Theodoros Foradis
` (2 more replies)
0 siblings, 3 replies; 29+ messages in thread
From: Theodoros Foradis @ 2016-10-25 13:26 UTC (permalink / raw)
To: guix-devel
Theodoros Foradis (3):
gnu: Add gdb-arm-none-eabi.
gnu: Add hidapi.
gnu: Add openocd.
gnu/local.mk | 2 +
gnu/packages/embedded.scm | 85 +++++++++++++++++
gnu/packages/hidapi.scm | 60 ++++++++++++
gnu/packages/patches/openocd-nrf52.patch | 1156 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 1303 insertions(+)
^ permalink raw reply [flat|nested] 29+ messages in thread* [PATCH 1/3] gnu: Add gdb-arm-none-eabi. 2016-10-25 13:26 [PATCH 0/3] gnu: Add gdb-arm-none-eabi and openocd Theodoros Foradis @ 2016-10-25 13:26 ` Theodoros Foradis 2016-10-26 12:57 ` David Craven 2016-10-25 13:26 ` [PATCH 2/3] gnu: Add hidapi Theodoros Foradis 2016-10-25 13:26 ` [PATCH 3/3] gnu: Add openocd Theodoros Foradis 2 siblings, 1 reply; 29+ messages in thread From: Theodoros Foradis @ 2016-10-25 13:26 UTC (permalink / raw) To: guix-devel * gnu/packages/embedded.scm (gdb-arm-none-eabi): New variable. --- gnu/packages/embedded.scm | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/gnu/packages/embedded.scm b/gnu/packages/embedded.scm index a7af69f..0b4f9ab 100644 --- a/gnu/packages/embedded.scm +++ b/gnu/packages/embedded.scm @@ -31,6 +31,7 @@ #:use-module (gnu packages cross-base) #:use-module (gnu packages flex) #:use-module (gnu packages gcc) + #:use-module (gnu packages gdb) #:use-module (gnu packages perl) #:use-module (gnu packages texinfo)) @@ -223,3 +224,15 @@ languages are C and C++.") (define-public arm-none-eabi-nano-toolchain-6 (arm-none-eabi-toolchain gcc-arm-none-eabi-6 newlib-nano-arm-none-eabi)) + +(define-public gdb-arm-none-eabi + (package + (inherit gdb) + (name "gdb-arm-none-eabi") + (arguments + `(#:configure-flags '("--target=arm-none-eabi" + "--enable-multilib" + "--enable-interwork" + "--enable-languages=c,c++" + "--disable-nls") + ,@(package-arguments gdb))))) -- 2.10.1 ^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [PATCH 1/3] gnu: Add gdb-arm-none-eabi. 2016-10-25 13:26 ` [PATCH 1/3] gnu: Add gdb-arm-none-eabi Theodoros Foradis @ 2016-10-26 12:57 ` David Craven 0 siblings, 0 replies; 29+ messages in thread From: David Craven @ 2016-10-26 12:57 UTC (permalink / raw) To: Theodoros Foradis; +Cc: guix-devel LGTM! ^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH 2/3] gnu: Add hidapi. 2016-10-25 13:26 [PATCH 0/3] gnu: Add gdb-arm-none-eabi and openocd Theodoros Foradis 2016-10-25 13:26 ` [PATCH 1/3] gnu: Add gdb-arm-none-eabi Theodoros Foradis @ 2016-10-25 13:26 ` Theodoros Foradis 2016-10-26 12:55 ` David Craven 2016-10-25 13:26 ` [PATCH 3/3] gnu: Add openocd Theodoros Foradis 2 siblings, 1 reply; 29+ messages in thread From: Theodoros Foradis @ 2016-10-25 13:26 UTC (permalink / raw) To: guix-devel * gnu/packages/hidapi.scm: New file. * gnu/local.mk (GNU_SYSTEM_MODULES): Add it. --- gnu/local.mk | 1 + gnu/packages/hidapi.scm | 60 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+) create mode 100644 gnu/packages/hidapi.scm diff --git a/gnu/local.mk b/gnu/local.mk index 51849f4..12066c1 100644 --- a/gnu/local.mk +++ b/gnu/local.mk @@ -178,6 +178,7 @@ GNU_SYSTEM_MODULES = \ %D%/packages/gxmessage.scm \ %D%/packages/haskell.scm \ %D%/packages/hexedit.scm \ + %D%/packages/hidapi.scm \ %D%/packages/hugs.scm \ %D%/packages/hurd.scm \ %D%/packages/ibus.scm \ diff --git a/gnu/packages/hidapi.scm b/gnu/packages/hidapi.scm new file mode 100644 index 0000000..986f5b5 --- /dev/null +++ b/gnu/packages/hidapi.scm @@ -0,0 +1,60 @@ +;;; GNU Guix --- Functional package management for GNU +;;; Copyright © 2016 Theodoros Foradis <theodoros.for@openmailbox.org> +;;; +;;; This file is part of GNU Guix. +;;; +;;; GNU Guix is free software; you can redistribute it and/or modify it +;;; under the terms of the GNU General Public License as published by +;;; the Free Software Foundation; either version 3 of the License, or (at +;;; your option) any later version. +;;; +;;; GNU Guix is distributed in the hope that it will be useful, but +;;; WITHOUT ANY WARRANTY; without even the implied warranty of +;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;;; GNU General Public License for more details. +;;; +;;; You should have received a copy of the GNU General Public License +;;; along with GNU Guix. If not, see <http://www.gnu.org/licenses/>. + +(define-module (gnu packages hidapi) + #:use-module (guix packages) + #:use-module (guix download) + #:use-module ((guix licenses) #:prefix license:) + #:use-module (guix build-system gnu) + #:use-module (gnu packages) + #:use-module (gnu packages autotools) + #:use-module (gnu packages libusb) + #:use-module (gnu packages linux) + #:use-module (gnu packages pkg-config)) + +(define-public hidapi + (package + (name "hidapi") + (version "0.8.0-rc1") + (source (origin + (method url-fetch) + (uri (string-append "https://github.com/signal11/hidapi/archive/hidapi-" + version ".tar.gz")) + (sha256 + (base32 + "0qdgyj9rgb7n0nk3ghfswrhzzknxqn4ibn3wj8g4r828pw07451w")))) + (build-system gnu-build-system) + (arguments + '(#:phases + (modify-phases %standard-phases + (add-before 'configure 'bootstrap + (lambda _ + (system* "./bootstrap") + #t))))) + (inputs `(("libusb" ,libusb) + ("udev" ,eudev))) + (native-inputs `(("autoconf" ,autoconf) + ("libtool" ,libtool) + ("automake" ,automake) + ("pkg-config" ,pkg-config))) + (home-page "http://www.signal11.us/oss/hidapi/") + (synopsis "HID API library") + (description + "HIDAPI is a library which allows an application to interface with USB and Bluetooth + HID-Class devices.") + (license license:gpl3))) -- 2.10.1 ^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [PATCH 2/3] gnu: Add hidapi. 2016-10-25 13:26 ` [PATCH 2/3] gnu: Add hidapi Theodoros Foradis @ 2016-10-26 12:55 ` David Craven 2016-10-26 18:29 ` Theodoros Foradis 0 siblings, 1 reply; 29+ messages in thread From: David Craven @ 2016-10-26 12:55 UTC (permalink / raw) To: Theodoros Foradis; +Cc: guix-devel I don't think we need this: (arguments + '(#:phases + (modify-phases %standard-phases + (add-before 'configure 'bootstrap + (lambda _ + (system* "./bootstrap") + #t))))) > + (native-inputs `(("autoconf" ,autoconf) > + ("libtool" ,libtool) > + ("automake" ,automake) > + ("pkg-config" ,pkg-config))) Is license is gpl3+ + (license license:gpl3))) Input list indentation. ^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 2/3] gnu: Add hidapi. 2016-10-26 12:55 ` David Craven @ 2016-10-26 18:29 ` Theodoros Foradis 2016-10-26 18:50 ` David Craven 0 siblings, 1 reply; 29+ messages in thread From: Theodoros Foradis @ 2016-10-26 18:29 UTC (permalink / raw) To: Guix-devel David Craven writes: > I don't think we need this: > > (arguments > + '(#:phases > + (modify-phases %standard-phases > + (add-before 'configure 'bootstrap > + (lambda _ > + (system* "./bootstrap") > + #t))))) > >> + (native-inputs `(("autoconf" ,autoconf) >> + ("libtool" ,libtool) >> + ("automake" ,automake) >> + ("pkg-config" ,pkg-config))) > There is no configure script in the release tarball, so I think we either need this or: (lambda _ (system* "autoreconf" "-vfi") #t) Can't build without neither. > Is license is gpl3+ > > + (license license:gpl3))) > LICENSE.txt says: HIDAPI can be used under one of three licenses. 1. The GNU General Public License, version 3.0, in LICENSE-gpl3.txt What am I missing? > Input list indentation. Thanks for letting me know. -- Theodoros Foradis ^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 2/3] gnu: Add hidapi. 2016-10-26 18:29 ` Theodoros Foradis @ 2016-10-26 18:50 ` David Craven 0 siblings, 0 replies; 29+ messages in thread From: David Craven @ 2016-10-26 18:50 UTC (permalink / raw) To: Theodoros Foradis; +Cc: Guix-devel > There is no configure script in the release tarball, so I think we > either need this or: Ah ok then... (zero? (system* "autoreconf" "-vfi")) might be nicer than (system* "./bootstrap.sh") but doesn't really matter. I thought that when you create a tarball with `make dist` the configure file is included. > What am I missing? I'm not sure if you mean in regard to the license or the input indentation. With input indentation I mean the same I wrote on the openocd patch: (native-inputs `(("autoconf" ,autoconf) ("libtool" ,libtool) LICENSE-gpl3.txt says: This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version. I didn't see that there are three other license files too, those should be mentioned then. ^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH 3/3] gnu: Add openocd. 2016-10-25 13:26 [PATCH 0/3] gnu: Add gdb-arm-none-eabi and openocd Theodoros Foradis 2016-10-25 13:26 ` [PATCH 1/3] gnu: Add gdb-arm-none-eabi Theodoros Foradis 2016-10-25 13:26 ` [PATCH 2/3] gnu: Add hidapi Theodoros Foradis @ 2016-10-25 13:26 ` Theodoros Foradis 2016-10-26 12:49 ` David Craven 2 siblings, 1 reply; 29+ messages in thread From: Theodoros Foradis @ 2016-10-25 13:26 UTC (permalink / raw) To: guix-devel * gnu/packages/embedded.scm (openocd): New variable. * gnu/packages/patches/openocd-nrf52.patch: New file. * gnu/local.mk (dist_patch_DATA): Add the patch. --- gnu/local.mk | 1 + gnu/packages/embedded.scm | 72 ++ gnu/packages/patches/openocd-nrf52.patch | 1156 ++++++++++++++++++++++++++++++ 3 files changed, 1229 insertions(+) create mode 100644 gnu/packages/patches/openocd-nrf52.patch diff --git a/gnu/local.mk b/gnu/local.mk index 12066c1..d75ab5e 100644 --- a/gnu/local.mk +++ b/gnu/local.mk @@ -740,6 +740,7 @@ dist_patch_DATA = \ %D%/packages/patches/openjpeg-CVE-2016-5157.patch \ %D%/packages/patches/openjpeg-CVE-2016-7163.patch \ %D%/packages/patches/openjpeg-use-after-free-fix.patch \ + %D%/packages/patches/openocd-nrf52.patch \ %D%/packages/patches/openssh-memory-exhaustion.patch \ %D%/packages/patches/openssl-runpath.patch \ %D%/packages/patches/openssl-1.1.0-c-rehash-in.patch \ diff --git a/gnu/packages/embedded.scm b/gnu/packages/embedded.scm index 0b4f9ab..03cc0a7 100644 --- a/gnu/packages/embedded.scm +++ b/gnu/packages/embedded.scm @@ -28,11 +28,16 @@ #:use-module (guix build-system trivial) #:use-module (guix build utils) #:use-module (gnu packages) + #:use-module (gnu packages autotools) #:use-module (gnu packages cross-base) #:use-module (gnu packages flex) #:use-module (gnu packages gcc) #:use-module (gnu packages gdb) + #:use-module (gnu packages hidapi) + #:use-module (gnu packages libftdi) + #:use-module (gnu packages libusb) #:use-module (gnu packages perl) + #:use-module (gnu packages pkg-config) #:use-module (gnu packages texinfo)) ;; We must not use the released GCC sources here, because the cross-compiler @@ -236,3 +241,70 @@ languages are C and C++.") "--enable-languages=c,c++" "--disable-nls") ,@(package-arguments gdb))))) + +;; We build openocd from git, because the JTAG library libjaylink +;; is not included in tarball releases. +(define-public openocd + (let* ((commit "12ff09f7f27a707fe42226262f55b8ce8351cbf9") + (hash "1sa3kavvlmf8h04m6b15f37960ndwx9xn19myfs3lyxh531p51dr")) + (package + (name "openocd") + (version (string-take commit 7)) + (source (origin + (method git-fetch) + (uri (git-reference + (url (string-append "git://git.code.sf.net/p/" name "/code.git")) + (commit commit) + (recursive? #t))) + (sha256 + (base32 hash)) + (file-name (string-append name "-" version "-checkout.tar.xz")) + (patches + (search-patches "openocd-nrf52.patch")))) + (build-system gnu-build-system) + (arguments + '(#:configure-flags + (append (list "--disable-werror") + (map (lambda (programmer) + (string-append "--enable-" programmer)) + '("amtjtagaccel" "armjtagew" "buspirate" "ftdi" + "gw16012" "jlink" "oocd_trace" "opendous" "osbdm" + "parport" "aice" "cmsis-dap" "dummy" "jtag_vpi" "remote-bitbang" + "rlink" "stlink" "ti-icdi" "ulink" "usbprog" "vsllink" + "usb-blaster-2" "usb_blaster" "presto" "openjtag"))) + #:phases + (modify-phases %standard-phases + (add-before 'configure 'bootstrap + (lambda _ + (system* "aclocal") + (system* "libtoolize" "--automake" "--copy") + (system* "autoconf") + (system* "autoheader") + (system* "automake" "--gnu" "--add-missing" "--copy") + #t)) + (add-after 'bootstrap 'patch-configure + (lambda _ + (substitute* "configure" + (("SHELL = /bin/sh") (string-append "SHELL = " (which "sh")))) + (substitute* "configure" + (("srcdir/src/jtag/drivers/libjaylink/configure.gnu") + (string-append "echo -e '#!" (which "sh") "\nexec \"`dirname \"'\\$'0\"` +/configure\" --enable-subproject-build \"'\\$'@\"' > \" +$srcdir/src/jtag/drivers/libjaylink/configure.gnu\""))) + #t))))) + (inputs `(("libusb" ,libusb) + ("libusb-compat" ,libusb-compat) + ("libftdi" ,libftdi) + ("hidapi" ,hidapi))) + (native-inputs `(("autoconf" ,autoconf) + ("libtool" ,libtool) + ("automake" ,automake) + ("pkg-config" ,pkg-config))) + (home-page "http://openocd.org") + (synopsis "Open On-Chip Debugger") + (description + "OpenOCD provides on-chip programming and debugging support with a +layered architecture of JTAG interface and TAP support.") + (license (list license:gpl2 ;; openocd and git2cl submodule + license:gpl2+ ;; libjaylink submodule + license:bsd-2))))) ;; jimctl submodule diff --git a/gnu/packages/patches/openocd-nrf52.patch b/gnu/packages/patches/openocd-nrf52.patch new file mode 100644 index 0000000..d376049 --- /dev/null +++ b/gnu/packages/patches/openocd-nrf52.patch @@ -0,0 +1,1156 @@ +This patch is commit 6861f0d81a626ab14be5d5b4f227f6f3683b42bb, from openocd's +development git repository (http://openocd.zylin.com/openocd), modified for +the commit we are using. + +commit 6861f0d81a626ab14be5d5b4f227f6f3683b42bb +Author: Job Vranish <job.vranish@gmail.com> +Date: Thu Jan 21 16:21:42 2016 -0500 + + topic: Added flash support for the nrf52 from Nordic Semiconductor. + + This essentially copies the driver from the nrf51, fixes some compatability issues to make it function for the nrf52, removes references to registers that are now reserved on the nrf52, and adds flash banks to the nrf52 target config. + +diff --git a/src/flash/nor/Makefile.am b/src/flash/nor/Makefile.am +index c167e8f..49a2e46 100644 +--- a/src/flash/nor/Makefile.am ++++ b/src/flash/nor/Makefile.am +@@ -54,8 +54,19 @@ NOR_DRIVERS = \ + str9xpec.c \ + tms470.c \ + virtual.c \ ++ fm3.c \ ++ dsp5680xx_flash.c \ ++ kinetis.c \ ++ numicro.c \ ++ nrf51.c \ ++ nrf52.c \ ++ mrvlqspi.c \ ++ psoc4.c \ ++ sim3x.c \ + xmc1xxx.c \ +- xmc4xxx.c ++ xmc4xxx.c \ ++ niietcm4.c ++ + + noinst_HEADERS = \ + core.h \ +diff --git a/src/flash/nor/drivers.c b/src/flash/nor/drivers.c +index 56a5cb2..d0ee86e 100644 +--- a/src/flash/nor/drivers.c ++++ b/src/flash/nor/drivers.c +@@ -45,10 +45,11 @@ extern struct flash_driver lpc288x_flash; + extern struct flash_driver lpc2900_flash; + extern struct flash_driver lpcspifi_flash; + extern struct flash_driver mdr_flash; ++extern struct flash_driver numicro_flash; ++extern struct flash_driver nrf51_flash; ++extern struct flash_driver nrf52_flash; + extern struct flash_driver mrvlqspi_flash; + extern struct flash_driver niietcm4_flash; +-extern struct flash_driver nrf51_flash; +-extern struct flash_driver numicro_flash; + extern struct flash_driver ocl_flash; + extern struct flash_driver pic32mx_flash; + extern struct flash_driver psoc4_flash; +@@ -97,6 +98,9 @@ static struct flash_driver *flash_drivers[] = { + &lpc2900_flash, + &lpcspifi_flash, + &mdr_flash, ++ &numicro_flash, ++ &nrf51_flash, ++ &nrf52_flash, + &mrvlqspi_flash, + &niietcm4_flash, + &nrf51_flash, +diff --git a/src/flash/nor/nrf52.c b/src/flash/nor/nrf52.c +new file mode 100644 +index 0000000..e90174e +--- /dev/null ++++ b/src/flash/nor/nrf52.c +@@ -0,0 +1,1056 @@ ++ /************************************************************************** ++ * Copyright (C) 2013 Synapse Product Development * ++ * Andrey Smirnov <andrew.smironv@gmail.com> * ++ * Angus Gratton <gus@projectgus.com> * ++ * Erdem U. Altunyurt <spamjunkeater@gmail.com> * ++ * * ++ * Ported nrf51 flash driver to the nrf52 Copyright (C) 2016 * ++ * by Job Vranish <jvranish@gmail.com> * ++ * * ++ * This program is free software; you can redistribute it and/or modify * ++ * it under the terms of the GNU General Public License as published by * ++ * the Free Software Foundation; either version 2 of the License, or * ++ * (at your option) any later version. * ++ * * ++ * This program is distributed in the hope that it will be useful, * ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of * ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * ++ * GNU General Public License for more details. * ++ * * ++ * You should have received a copy of the GNU General Public License * ++ * along with this program; if not, write to the * ++ * Free Software Foundation, Inc., * ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * ++ ***************************************************************************/ ++ ++#ifdef HAVE_CONFIG_H ++#include "config.h" ++#endif ++ ++#include "imp.h" ++#include <target/algorithm.h> ++#include <target/armv7m.h> ++#include <helper/types.h> ++ ++enum { ++ NRF52_FLASH_BASE = 0x00000000, ++}; ++ ++enum nrf52_ficr_registers { ++ NRF52_FICR_BASE = 0x10000000, /* Factory Information Configuration Registers */ ++ ++#define NRF52_FICR_REG(offset) (NRF52_FICR_BASE + offset) ++ ++ NRF52_FICR_CODEPAGESIZE = NRF52_FICR_REG(0x010), ++ NRF52_FICR_CODESIZE = NRF52_FICR_REG(0x014), ++ NRF52_FICR_CLENR0 = NRF52_FICR_REG(0x028), ++ NRF52_FICR_PPFC = NRF52_FICR_REG(0x02C), ++ NRF52_FICR_NUMRAMBLOCK = NRF52_FICR_REG(0x034), ++ NRF52_FICR_SIZERAMBLOCK0 = NRF52_FICR_REG(0x038), ++ NRF52_FICR_SIZERAMBLOCK1 = NRF52_FICR_REG(0x03C), ++ NRF52_FICR_SIZERAMBLOCK2 = NRF52_FICR_REG(0x040), ++ NRF52_FICR_SIZERAMBLOCK3 = NRF52_FICR_REG(0x044), ++ NRF52_FICR_CONFIGID = NRF52_FICR_REG(0x05C), ++ NRF52_FICR_DEVICEID0 = NRF52_FICR_REG(0x060), ++ NRF52_FICR_DEVICEID1 = NRF52_FICR_REG(0x064), ++ NRF52_FICR_ER0 = NRF52_FICR_REG(0x080), ++ NRF52_FICR_ER1 = NRF52_FICR_REG(0x084), ++ NRF52_FICR_ER2 = NRF52_FICR_REG(0x088), ++ NRF52_FICR_ER3 = NRF52_FICR_REG(0x08C), ++ NRF52_FICR_IR0 = NRF52_FICR_REG(0x090), ++ NRF52_FICR_IR1 = NRF52_FICR_REG(0x094), ++ NRF52_FICR_IR2 = NRF52_FICR_REG(0x098), ++ NRF52_FICR_IR3 = NRF52_FICR_REG(0x09C), ++ NRF52_FICR_DEVICEADDRTYPE = NRF52_FICR_REG(0x0A0), ++ NRF52_FICR_DEVICEADDR0 = NRF52_FICR_REG(0x0A4), ++ NRF52_FICR_DEVICEADDR1 = NRF52_FICR_REG(0x0A8), ++}; ++ ++enum nrf52_uicr_registers { ++ NRF52_UICR_BASE = 0x10001000, /* User Information ++ * Configuration Regsters */ ++ ++ NRF52_UICR_SIZE = 0x100, ++ ++#define NRF52_UICR_REG(offset) (NRF52_UICR_BASE + offset) ++ ++ NRF52_UICR_CLENR0 = NRF52_UICR_REG(0x000), ++ NRF52_UICR_RBPCONF = NRF52_UICR_REG(0x004), ++ NRF52_UICR_XTALFREQ = NRF52_UICR_REG(0x008), ++ NRF52_UICR_FWID = NRF52_UICR_REG(0x010), ++}; ++ ++enum nrf52_nvmc_registers { ++ NRF52_NVMC_BASE = 0x4001E000, /* Non-Volatile Memory ++ * Controller Regsters */ ++ ++#define NRF52_NVMC_REG(offset) (NRF52_NVMC_BASE + offset) ++ ++ NRF52_NVMC_READY = NRF52_NVMC_REG(0x400), ++ NRF52_NVMC_CONFIG = NRF52_NVMC_REG(0x504), ++ NRF52_NVMC_ERASEPAGE = NRF52_NVMC_REG(0x508), ++ NRF52_NVMC_ERASEALL = NRF52_NVMC_REG(0x50C), ++ NRF52_NVMC_ERASEUICR = NRF52_NVMC_REG(0x514), ++}; ++ ++enum nrf52_nvmc_config_bits { ++ NRF52_NVMC_CONFIG_REN = 0x00, ++ NRF52_NVMC_CONFIG_WEN = 0x01, ++ NRF52_NVMC_CONFIG_EEN = 0x02, ++ ++}; ++ ++struct nrf52_info { ++ uint32_t code_page_size; ++ uint32_t code_memory_size; ++ ++ struct { ++ bool probed; ++ int (*write) (struct flash_bank *bank, ++ struct nrf52_info *chip, ++ const uint8_t *buffer, uint32_t offset, uint32_t count); ++ } bank[2]; ++ struct target *target; ++}; ++ ++struct nrf52_device_spec { ++ uint16_t hwid; ++ /* The following two fields are informational only */ ++ const char *variant; ++ const char *build_code; ++ /* This is used to verify flash size read from device registers matches ++ what's expected */ ++ unsigned int flash_size_kb; ++}; ++ ++static const struct nrf52_device_spec nrf52_known_devices_table[] = { ++ { ++ .hwid = 0x0053, ++ .variant = "QFAA", ++ .build_code = "AA", ++ .flash_size_kb = 512, ++ }, ++}; ++ ++static int nrf52_bank_is_probed(struct flash_bank *bank) ++{ ++ struct nrf52_info *chip = bank->driver_priv; ++ ++ assert(chip != NULL); ++ ++ return chip->bank[bank->bank_number].probed; ++} ++static int nrf52_probe(struct flash_bank *bank); ++ ++static int nrf52_get_probed_chip_if_halted(struct flash_bank *bank, struct nrf52_info **chip) ++{ ++ if (bank->target->state != TARGET_HALTED) { ++ LOG_ERROR("Target not halted"); ++ return ERROR_TARGET_NOT_HALTED; ++ } ++ ++ *chip = bank->driver_priv; ++ ++ int probed = nrf52_bank_is_probed(bank); ++ if (probed < 0) ++ return probed; ++ else if (!probed) ++ return nrf52_probe(bank); ++ else ++ return ERROR_OK; ++} ++ ++static int nrf52_wait_for_nvmc(struct nrf52_info *chip) ++{ ++ uint32_t ready; ++ int res; ++ int timeout = 100; ++ ++ do { ++ res = target_read_u32(chip->target, NRF52_NVMC_READY, &ready); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read NVMC_READY register"); ++ return res; ++ } ++ ++ if (ready == 0x00000001) ++ return ERROR_OK; ++ ++ alive_sleep(1); ++ } while (timeout--); ++ ++ LOG_DEBUG("Timed out waiting for NVMC_READY"); ++ return ERROR_FLASH_BUSY; ++} ++ ++static int nrf52_nvmc_erase_enable(struct nrf52_info *chip) ++{ ++ int res; ++ res = target_write_u32(chip->target, ++ NRF52_NVMC_CONFIG, ++ NRF52_NVMC_CONFIG_EEN); ++ ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to enable erase operation"); ++ return res; ++ } ++ ++ /* ++ According to NVMC examples in Nordic SDK busy status must be ++ checked after writing to NVMC_CONFIG ++ */ ++ res = nrf52_wait_for_nvmc(chip); ++ if (res != ERROR_OK) ++ LOG_ERROR("Erase enable did not complete"); ++ ++ return res; ++} ++ ++static int nrf52_nvmc_write_enable(struct nrf52_info *chip) ++{ ++ int res; ++ res = target_write_u32(chip->target, ++ NRF52_NVMC_CONFIG, ++ NRF52_NVMC_CONFIG_WEN); ++ ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to enable write operation"); ++ return res; ++ } ++ ++ /* ++ According to NVMC examples in Nordic SDK busy status must be ++ checked after writing to NVMC_CONFIG ++ */ ++ res = nrf52_wait_for_nvmc(chip); ++ if (res != ERROR_OK) ++ LOG_ERROR("Write enable did not complete"); ++ ++ return res; ++} ++ ++static int nrf52_nvmc_read_only(struct nrf52_info *chip) ++{ ++ int res; ++ res = target_write_u32(chip->target, ++ NRF52_NVMC_CONFIG, ++ NRF52_NVMC_CONFIG_REN); ++ ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to enable read-only operation"); ++ return res; ++ } ++ /* ++ According to NVMC examples in Nordic SDK busy status must be ++ checked after writing to NVMC_CONFIG ++ */ ++ res = nrf52_wait_for_nvmc(chip); ++ if (res != ERROR_OK) ++ LOG_ERROR("Read only enable did not complete"); ++ ++ return res; ++} ++ ++static int nrf52_nvmc_generic_erase(struct nrf52_info *chip, ++ uint32_t erase_register, uint32_t erase_value) ++{ ++ int res; ++ ++ res = nrf52_nvmc_erase_enable(chip); ++ if (res != ERROR_OK) ++ goto error; ++ ++ res = target_write_u32(chip->target, ++ erase_register, ++ erase_value); ++ if (res != ERROR_OK) ++ goto set_read_only; ++ ++ res = nrf52_wait_for_nvmc(chip); ++ if (res != ERROR_OK) ++ goto set_read_only; ++ ++ return nrf52_nvmc_read_only(chip); ++ ++set_read_only: ++ nrf52_nvmc_read_only(chip); ++error: ++ LOG_ERROR("Failed to erase reg: 0x%08"PRIx32" val: 0x%08"PRIx32, ++ erase_register, erase_value); ++ return ERROR_FAIL; ++} ++ ++static int nrf52_protect_check(struct flash_bank *bank) ++{ ++ int res; ++ uint32_t clenr0; ++ ++ /* UICR cannot be write protected so just return early */ ++ if (bank->base == NRF52_UICR_BASE) ++ return ERROR_OK; ++ ++ struct nrf52_info *chip = bank->driver_priv; ++ ++ assert(chip != NULL); ++ ++ res = target_read_u32(chip->target, NRF52_FICR_CLENR0, ++ &clenr0); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read code region 0 size[FICR]"); ++ return res; ++ } ++ ++ if (clenr0 == 0xFFFFFFFF) { ++ res = target_read_u32(chip->target, NRF52_UICR_CLENR0, ++ &clenr0); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read code region 0 size[UICR]"); ++ return res; ++ } ++ } ++ ++ for (int i = 0; i < bank->num_sectors; i++) ++ bank->sectors[i].is_protected = ++ clenr0 != 0xFFFFFFFF && bank->sectors[i].offset < clenr0; ++ ++ return ERROR_OK; ++} ++ ++static int nrf52_protect(struct flash_bank *bank, int set, int first, int last) ++{ ++ int res; ++ uint32_t clenr0, ppfc; ++ struct nrf52_info *chip; ++ ++ /* UICR cannot be write protected so just bail out early */ ++ if (bank->base == NRF52_UICR_BASE) ++ return ERROR_FAIL; ++ ++ res = nrf52_get_probed_chip_if_halted(bank, &chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ if (first != 0) { ++ LOG_ERROR("Code region 0 must start at the begining of the bank"); ++ return ERROR_FAIL; ++ } ++ ++ res = target_read_u32(chip->target, NRF52_FICR_PPFC, ++ &ppfc); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read PPFC register"); ++ return res; ++ } ++ ++ if ((ppfc & 0xFF) == 0x00) { ++ LOG_ERROR("Code region 0 size was pre-programmed at the factory, can't change flash protection settings"); ++ return ERROR_FAIL; ++ }; ++ ++ res = target_read_u32(chip->target, NRF52_UICR_CLENR0, ++ &clenr0); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read code region 0 size[UICR]"); ++ return res; ++ } ++ ++ if (clenr0 == 0xFFFFFFFF) { ++ res = target_write_u32(chip->target, NRF52_UICR_CLENR0, ++ clenr0); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't write code region 0 size[UICR]"); ++ return res; ++ } ++ ++ } else { ++ LOG_ERROR("You need to perform chip erase before changing the protection settings"); ++ } ++ ++ nrf52_protect_check(bank); ++ ++ return ERROR_OK; ++} ++ ++static int nrf52_probe(struct flash_bank *bank) ++{ ++ uint32_t hwid; ++ int res; ++ struct nrf52_info *chip = bank->driver_priv; ++ ++ res = target_read_u32(chip->target, NRF52_FICR_CONFIGID, &hwid); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read CONFIGID register"); ++ return res; ++ } ++ ++ hwid &= 0xFFFF; /* HWID is stored in the lower two ++ * bytes of the CONFIGID register */ ++ ++ const struct nrf52_device_spec *spec = NULL; ++ for (size_t i = 0; i < ARRAY_SIZE(nrf52_known_devices_table); i++) ++ if (hwid == nrf52_known_devices_table[i].hwid) { ++ spec = &nrf52_known_devices_table[i]; ++ break; ++ } ++ ++ if (!chip->bank[0].probed && !chip->bank[1].probed) { ++ if (spec) ++ LOG_INFO("nRF51822-%s(build code: %s) %ukB Flash", ++ spec->variant, spec->build_code, spec->flash_size_kb); ++ else ++ LOG_WARNING("Unknown device (HWID 0x%08" PRIx32 ")", hwid); ++ } ++ ++ ++ if (bank->base == NRF52_FLASH_BASE) { ++ res = target_read_u32(chip->target, NRF52_FICR_CODEPAGESIZE, ++ &chip->code_page_size); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read code page size"); ++ return res; ++ } ++ ++ res = target_read_u32(chip->target, NRF52_FICR_CODESIZE, ++ &chip->code_memory_size); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read code memory size"); ++ return res; ++ } ++ ++ bank->size = chip->code_memory_size * chip->code_page_size; ++ bank->num_sectors = bank->size / chip->code_page_size; ++ bank->sectors = calloc(bank->num_sectors, ++ sizeof((bank->sectors)[0])); ++ if (!bank->sectors) ++ return ERROR_FLASH_BANK_NOT_PROBED; ++ ++ unsigned int code_memory_size_kb = bank->size / 1024; ++ ++ if (spec && code_memory_size_kb != spec->flash_size_kb) { ++ LOG_INFO("Chip's reported Flash capacity (%ukB) di not match expected one (%ukB)", code_memory_size_kb, spec->flash_size_kb); ++ return ERROR_FAIL; ++ } ++ ++ /* Fill out the sector information: all NRF51 sectors are the same size and ++ * there is always a fixed number of them. */ ++ for (int i = 0; i < bank->num_sectors; i++) { ++ bank->sectors[i].size = chip->code_page_size; ++ bank->sectors[i].offset = i * chip->code_page_size; ++ ++ /* mark as unknown */ ++ bank->sectors[i].is_erased = -1; ++ bank->sectors[i].is_protected = -1; ++ } ++ ++ nrf52_protect_check(bank); ++ ++ chip->bank[0].probed = true; ++ } else { ++ bank->size = NRF52_UICR_SIZE; ++ bank->num_sectors = 1; ++ bank->sectors = calloc(bank->num_sectors, ++ sizeof((bank->sectors)[0])); ++ if (!bank->sectors) ++ return ERROR_FLASH_BANK_NOT_PROBED; ++ ++ bank->sectors[0].size = bank->size; ++ bank->sectors[0].offset = 0; ++ ++ /* mark as unknown */ ++ bank->sectors[0].is_erased = 0; ++ bank->sectors[0].is_protected = 0; ++ ++ chip->bank[1].probed = true; ++ } ++ ++ return ERROR_OK; ++} ++ ++static int nrf52_auto_probe(struct flash_bank *bank) ++{ ++ int probed = nrf52_bank_is_probed(bank); ++ ++ if (probed < 0) ++ return probed; ++ else if (probed) ++ return ERROR_OK; ++ else ++ return nrf52_probe(bank); ++} ++ ++static struct flash_sector *nrf52_find_sector_by_address(struct flash_bank *bank, uint32_t address) ++{ ++ struct nrf52_info *chip = bank->driver_priv; ++ ++ for (int i = 0; i < bank->num_sectors; i++) ++ if (bank->sectors[i].offset <= address && ++ address < (bank->sectors[i].offset + chip->code_page_size)) ++ return &bank->sectors[i]; ++ return NULL; ++} ++ ++static int nrf52_erase_all(struct nrf52_info *chip) ++{ ++ LOG_DEBUG("Erasing all non-volatile memory"); ++ return nrf52_nvmc_generic_erase(chip, ++ NRF52_NVMC_ERASEALL, ++ 0x00000001); ++} ++ ++static int nrf52_erase_page(struct flash_bank *bank, ++ struct nrf52_info *chip, ++ struct flash_sector *sector) ++{ ++ int res; ++ ++ LOG_DEBUG("Erasing page at 0x%"PRIx32, sector->offset); ++ if (sector->is_protected) { ++ LOG_ERROR("Cannot erase protected sector at 0x%" PRIx32, sector->offset); ++ return ERROR_FAIL; ++ } ++ ++ if (bank->base == NRF52_UICR_BASE) { ++ uint32_t ppfc; ++ res = target_read_u32(chip->target, NRF52_FICR_PPFC, ++ &ppfc); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read PPFC register"); ++ return res; ++ } ++ ++ if ((ppfc & 0xFF) == 0xFF) { ++ /* We can't erase the UICR. Double-check to ++ see if it's already erased before complaining. */ ++ default_flash_blank_check(bank); ++ if (sector->is_erased == 1) ++ return ERROR_OK; ++ ++ LOG_ERROR("The chip was not pre-programmed with SoftDevice stack and UICR cannot be erased separately. Please issue mass erase before trying to write to this region"); ++ return ERROR_FAIL; ++ }; ++ ++ res = nrf52_nvmc_generic_erase(chip, ++ NRF52_NVMC_ERASEUICR, ++ 0x00000001); ++ ++ ++ } else { ++ res = nrf52_nvmc_generic_erase(chip, ++ NRF52_NVMC_ERASEPAGE, ++ sector->offset); ++ } ++ ++ if (res == ERROR_OK) ++ sector->is_erased = 1; ++ ++ return res; ++} ++ ++static const uint8_t nrf52_flash_write_code[] = { ++ /* See contrib/loaders/flash/cortex-m0.S */ ++/* <wait_fifo>: */ ++ 0x0d, 0x68, /* ldr r5, [r1, #0] */ ++ 0x00, 0x2d, /* cmp r5, #0 */ ++ 0x0b, 0xd0, /* beq.n 1e <exit> */ ++ 0x4c, 0x68, /* ldr r4, [r1, #4] */ ++ 0xac, 0x42, /* cmp r4, r5 */ ++ 0xf9, 0xd0, /* beq.n 0 <wait_fifo> */ ++ 0x20, 0xcc, /* ldmia r4!, {r5} */ ++ 0x20, 0xc3, /* stmia r3!, {r5} */ ++ 0x94, 0x42, /* cmp r4, r2 */ ++ 0x01, 0xd3, /* bcc.n 18 <no_wrap> */ ++ 0x0c, 0x46, /* mov r4, r1 */ ++ 0x08, 0x34, /* adds r4, #8 */ ++/* <no_wrap>: */ ++ 0x4c, 0x60, /* str r4, [r1, #4] */ ++ 0x04, 0x38, /* subs r0, #4 */ ++ 0xf0, 0xd1, /* bne.n 0 <wait_fifo> */ ++/* <exit>: */ ++ 0x00, 0xbe /* bkpt 0x0000 */ ++}; ++ ++ ++/* Start a low level flash write for the specified region */ ++static int nrf52_ll_flash_write(struct nrf52_info *chip, uint32_t offset, const uint8_t *buffer, uint32_t bytes) ++{ ++ struct target *target = chip->target; ++ uint32_t buffer_size = 8192; ++ struct working_area *write_algorithm; ++ struct working_area *source; ++ uint32_t address = NRF52_FLASH_BASE + offset; ++ struct reg_param reg_params[4]; ++ struct armv7m_algorithm armv7m_info; ++ int retval = ERROR_OK; ++ ++ ++ LOG_DEBUG("Writing buffer to flash offset=0x%"PRIx32" bytes=0x%"PRIx32, offset, bytes); ++ assert(bytes % 4 == 0); ++ ++ /* allocate working area with flash programming code */ ++ if (target_alloc_working_area(target, sizeof(nrf52_flash_write_code), ++ &write_algorithm) != ERROR_OK) { ++ LOG_WARNING("no working area available, falling back to slow memory writes"); ++ ++ for (; bytes > 0; bytes -= 4) { ++ retval = target_write_memory(chip->target, offset, 4, 1, buffer); ++ if (retval != ERROR_OK) ++ return retval; ++ ++ retval = nrf52_wait_for_nvmc(chip); ++ if (retval != ERROR_OK) ++ return retval; ++ ++ offset += 4; ++ buffer += 4; ++ } ++ ++ return ERROR_OK; ++ } ++ ++ LOG_WARNING("using fast async flash loader. This is currently supported"); ++ LOG_WARNING("only with ST-Link and CMSIS-DAP. If you have issues, add"); ++ LOG_WARNING("\"set WORKAREASIZE 0\" before sourcing nrf52.cfg to disable it"); ++ ++ retval = target_write_buffer(target, write_algorithm->address, ++ sizeof(nrf52_flash_write_code), ++ nrf52_flash_write_code); ++ if (retval != ERROR_OK) ++ return retval; ++ ++ /* memory buffer */ ++ while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) { ++ buffer_size /= 2; ++ buffer_size &= ~3UL; /* Make sure it's 4 byte aligned */ ++ if (buffer_size <= 256) { ++ /* free working area, write algorithm already allocated */ ++ target_free_working_area(target, write_algorithm); ++ ++ LOG_WARNING("No large enough working area available, can't do block memory writes"); ++ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; ++ } ++ } ++ ++ armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; ++ armv7m_info.core_mode = ARM_MODE_THREAD; ++ ++ init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* byte count */ ++ init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer start */ ++ init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* buffer end */ ++ init_reg_param(®_params[3], "r3", 32, PARAM_IN_OUT); /* target address */ ++ ++ buf_set_u32(reg_params[0].value, 0, 32, bytes); ++ buf_set_u32(reg_params[1].value, 0, 32, source->address); ++ buf_set_u32(reg_params[2].value, 0, 32, source->address + source->size); ++ buf_set_u32(reg_params[3].value, 0, 32, address); ++ ++ retval = target_run_flash_async_algorithm(target, buffer, bytes/4, 4, ++ 0, NULL, ++ 4, reg_params, ++ source->address, source->size, ++ write_algorithm->address, 0, ++ &armv7m_info); ++ ++ target_free_working_area(target, source); ++ target_free_working_area(target, write_algorithm); ++ ++ destroy_reg_param(®_params[0]); ++ destroy_reg_param(®_params[1]); ++ destroy_reg_param(®_params[2]); ++ destroy_reg_param(®_params[3]); ++ ++ return retval; ++} ++ ++/* Check and erase flash sectors in specified range then start a low level page write. ++ start/end must be sector aligned. ++*/ ++static int nrf52_write_pages(struct flash_bank *bank, uint32_t start, uint32_t end, const uint8_t *buffer) ++{ ++ int res = ERROR_FAIL; ++ struct nrf52_info *chip = bank->driver_priv; ++ struct flash_sector *sector; ++ uint32_t offset; ++ ++ assert(start % chip->code_page_size == 0); ++ assert(end % chip->code_page_size == 0); ++ ++ /* Erase all sectors */ ++ for (offset = start; offset < end; offset += chip->code_page_size) { ++ sector = nrf52_find_sector_by_address(bank, offset); ++ if (!sector) { ++ LOG_ERROR("Invalid sector @ 0x%08"PRIx32, offset); ++ return ERROR_FLASH_SECTOR_INVALID; ++ } ++ ++ if (sector->is_protected) { ++ LOG_ERROR("Can't erase protected sector @ 0x%08"PRIx32, offset); ++ goto error; ++ } ++ ++ if (sector->is_erased != 1) { /* 1 = erased, 0= not erased, -1 = unknown */ ++ res = nrf52_erase_page(bank, chip, sector); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to erase sector @ 0x%08"PRIx32, sector->offset); ++ goto error; ++ } ++ } ++ sector->is_erased = 0; ++ } ++ ++ res = nrf52_nvmc_write_enable(chip); ++ if (res != ERROR_OK) ++ goto error; ++ ++ res = nrf52_ll_flash_write(chip, start, buffer, (end - start)); ++ if (res != ERROR_OK) ++ goto set_read_only; ++ ++ return nrf52_nvmc_read_only(chip); ++ ++set_read_only: ++ nrf52_nvmc_read_only(chip); ++error: ++ LOG_ERROR("Failed to write to nrf52 flash"); ++ return res; ++} ++ ++static int nrf52_erase(struct flash_bank *bank, int first, int last) ++{ ++ int res; ++ struct nrf52_info *chip; ++ ++ res = nrf52_get_probed_chip_if_halted(bank, &chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ /* For each sector to be erased */ ++ for (int s = first; s <= last && res == ERROR_OK; s++) ++ res = nrf52_erase_page(bank, chip, &bank->sectors[s]); ++ ++ return res; ++} ++ ++static int nrf52_code_flash_write(struct flash_bank *bank, ++ struct nrf52_info *chip, ++ const uint8_t *buffer, uint32_t offset, uint32_t count) ++{ ++ ++ int res; ++ /* Need to perform reads to fill any gaps we need to preserve in the first page, ++ before the start of buffer, or in the last page, after the end of buffer */ ++ uint32_t first_page = offset/chip->code_page_size; ++ uint32_t last_page = DIV_ROUND_UP(offset+count, chip->code_page_size); ++ ++ uint32_t first_page_offset = first_page * chip->code_page_size; ++ uint32_t last_page_offset = last_page * chip->code_page_size; ++ ++ LOG_DEBUG("Padding write from 0x%08"PRIx32"-0x%08"PRIx32" as 0x%08"PRIx32"-0x%08"PRIx32, ++ offset, offset+count, first_page_offset, last_page_offset); ++ ++ uint32_t page_cnt = last_page - first_page; ++ uint8_t buffer_to_flash[page_cnt*chip->code_page_size]; ++ ++ /* Fill in any space between start of first page and start of buffer */ ++ uint32_t pre = offset - first_page_offset; ++ if (pre > 0) { ++ res = target_read_memory(bank->target, ++ first_page_offset, ++ 1, ++ pre, ++ buffer_to_flash); ++ if (res != ERROR_OK) ++ return res; ++ } ++ ++ /* Fill in main contents of buffer */ ++ memcpy(buffer_to_flash+pre, buffer, count); ++ ++ /* Fill in any space between end of buffer and end of last page */ ++ uint32_t post = last_page_offset - (offset+count); ++ if (post > 0) { ++ /* Retrieve the full row contents from Flash */ ++ res = target_read_memory(bank->target, ++ offset + count, ++ 1, ++ post, ++ buffer_to_flash+pre+count); ++ if (res != ERROR_OK) ++ return res; ++ } ++ ++ return nrf52_write_pages(bank, first_page_offset, last_page_offset, buffer_to_flash); ++} ++ ++static int nrf52_uicr_flash_write(struct flash_bank *bank, ++ struct nrf52_info *chip, ++ const uint8_t *buffer, uint32_t offset, uint32_t count) ++{ ++ int res; ++ uint8_t uicr[NRF52_UICR_SIZE]; ++ struct flash_sector *sector = &bank->sectors[0]; ++ ++ if ((offset + count) > NRF52_UICR_SIZE) ++ return ERROR_FAIL; ++ ++ res = target_read_memory(bank->target, ++ NRF52_UICR_BASE, ++ 1, ++ NRF52_UICR_SIZE, ++ uicr); ++ ++ if (res != ERROR_OK) ++ return res; ++ ++ if (sector->is_erased != 1) { ++ res = nrf52_erase_page(bank, chip, sector); ++ if (res != ERROR_OK) ++ return res; ++ } ++ ++ res = nrf52_nvmc_write_enable(chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ memcpy(&uicr[offset], buffer, count); ++ ++ res = nrf52_ll_flash_write(chip, NRF52_UICR_BASE, uicr, NRF52_UICR_SIZE); ++ if (res != ERROR_OK) { ++ nrf52_nvmc_read_only(chip); ++ return res; ++ } ++ ++ return nrf52_nvmc_read_only(chip); ++} ++ ++ ++static int nrf52_write(struct flash_bank *bank, const uint8_t *buffer, ++ uint32_t offset, uint32_t count) ++{ ++ int res; ++ struct nrf52_info *chip; ++ ++ res = nrf52_get_probed_chip_if_halted(bank, &chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ return chip->bank[bank->bank_number].write(bank, chip, buffer, offset, count); ++} ++ ++ ++FLASH_BANK_COMMAND_HANDLER(nrf52_flash_bank_command) ++{ ++ static struct nrf52_info *chip; ++ ++ switch (bank->base) { ++ case NRF52_FLASH_BASE: ++ bank->bank_number = 0; ++ break; ++ case NRF52_UICR_BASE: ++ bank->bank_number = 1; ++ break; ++ default: ++ LOG_ERROR("Invalid bank address 0x%08" PRIx32, bank->base); ++ return ERROR_FAIL; ++ } ++ ++ if (!chip) { ++ /* Create a new chip */ ++ chip = calloc(1, sizeof(*chip)); ++ if (!chip) ++ return ERROR_FAIL; ++ ++ chip->target = bank->target; ++ } ++ ++ switch (bank->base) { ++ case NRF52_FLASH_BASE: ++ chip->bank[bank->bank_number].write = nrf52_code_flash_write; ++ break; ++ case NRF52_UICR_BASE: ++ chip->bank[bank->bank_number].write = nrf52_uicr_flash_write; ++ break; ++ } ++ ++ chip->bank[bank->bank_number].probed = false; ++ bank->driver_priv = chip; ++ ++ return ERROR_OK; ++} ++ ++COMMAND_HANDLER(nrf52_handle_mass_erase_command) ++{ ++ int res; ++ struct flash_bank *bank = NULL; ++ struct target *target = get_current_target(CMD_CTX); ++ ++ res = get_flash_bank_by_addr(target, NRF52_FLASH_BASE, true, &bank); ++ if (res != ERROR_OK) ++ return res; ++ ++ assert(bank != NULL); ++ ++ struct nrf52_info *chip; ++ ++ res = nrf52_get_probed_chip_if_halted(bank, &chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ uint32_t ppfc; ++ ++ res = target_read_u32(target, NRF52_FICR_PPFC, ++ &ppfc); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read PPFC register"); ++ return res; ++ } ++ ++ if ((ppfc & 0xFF) == 0x00) { ++ LOG_ERROR("Code region 0 size was pre-programmed at the factory, " ++ "mass erase command won't work."); ++ return ERROR_FAIL; ++ }; ++ ++ res = nrf52_erase_all(chip); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to erase the chip"); ++ nrf52_protect_check(bank); ++ return res; ++ } ++ ++ for (int i = 0; i < bank->num_sectors; i++) ++ bank->sectors[i].is_erased = 1; ++ ++ res = nrf52_protect_check(bank); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to check chip's write protection"); ++ return res; ++ } ++ ++ res = get_flash_bank_by_addr(target, NRF52_UICR_BASE, true, &bank); ++ if (res != ERROR_OK) ++ return res; ++ ++ bank->sectors[0].is_erased = 1; ++ ++ return ERROR_OK; ++} ++ ++static int nrf52_info(struct flash_bank *bank, char *buf, int buf_size) ++{ ++ int res; ++ ++ struct nrf52_info *chip; ++ ++ res = nrf52_get_probed_chip_if_halted(bank, &chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ static struct { ++ const uint32_t address; ++ uint32_t value; ++ } ficr[] = { ++ { .address = NRF52_FICR_CODEPAGESIZE }, ++ { .address = NRF52_FICR_CODESIZE }, ++ { .address = NRF52_FICR_CLENR0 }, ++ { .address = NRF52_FICR_PPFC }, ++ { .address = NRF52_FICR_NUMRAMBLOCK }, ++ { .address = NRF52_FICR_SIZERAMBLOCK0 }, ++ { .address = NRF52_FICR_SIZERAMBLOCK1 }, ++ { .address = NRF52_FICR_SIZERAMBLOCK2 }, ++ { .address = NRF52_FICR_SIZERAMBLOCK3 }, ++ { .address = NRF52_FICR_CONFIGID }, ++ { .address = NRF52_FICR_DEVICEID0 }, ++ { .address = NRF52_FICR_DEVICEID1 }, ++ { .address = NRF52_FICR_ER0 }, ++ { .address = NRF52_FICR_ER1 }, ++ { .address = NRF52_FICR_ER2 }, ++ { .address = NRF52_FICR_ER3 }, ++ { .address = NRF52_FICR_IR0 }, ++ { .address = NRF52_FICR_IR1 }, ++ { .address = NRF52_FICR_IR2 }, ++ { .address = NRF52_FICR_IR3 }, ++ { .address = NRF52_FICR_DEVICEADDRTYPE }, ++ { .address = NRF52_FICR_DEVICEADDR0 }, ++ { .address = NRF52_FICR_DEVICEADDR1 }, ++ }; ++ ++ for (size_t i = 0; i < ARRAY_SIZE(ficr); i++) { ++ res = target_read_u32(chip->target, ficr[i].address, ++ &ficr[i].value); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read %" PRIx32, ficr[i].address); ++ return res; ++ } ++ } ++ ++ snprintf(buf, buf_size, ++ "\n[factory information control block]\n\n" ++ "code page size: %"PRIu32"B\n" ++ "code memory size: %"PRIu32"kB\n" ++ "code region 0 size: %"PRIu32"kB\n" ++ "pre-programmed code: %s\n" ++ "number of ram blocks: %"PRIu32"\n" ++ "ram block 0 size: %"PRIu32"B\n" ++ "ram block 1 size: %"PRIu32"B\n" ++ "ram block 2 size: %"PRIu32"B\n" ++ "ram block 3 size: %"PRIu32 "B\n" ++ "config id: %" PRIx32 "\n" ++ "device id: 0x%"PRIx32"%08"PRIx32"\n" ++ "encryption root: 0x%08"PRIx32"%08"PRIx32"%08"PRIx32"%08"PRIx32"\n" ++ "identity root: 0x%08"PRIx32"%08"PRIx32"%08"PRIx32"%08"PRIx32"\n" ++ "device address type: 0x%"PRIx32"\n" ++ "device address: 0x%"PRIx32"%08"PRIx32"\n", ++ ficr[0].value, ++ ficr[1].value, ++ (ficr[2].value == 0xFFFFFFFF) ? 0 : ficr[2].value / 1024, ++ ((ficr[3].value & 0xFF) == 0x00) ? "present" : "not present", ++ ficr[4].value, ++ ficr[5].value, ++ (ficr[6].value == 0xFFFFFFFF) ? 0 : ficr[6].value, ++ (ficr[7].value == 0xFFFFFFFF) ? 0 : ficr[7].value, ++ (ficr[8].value == 0xFFFFFFFF) ? 0 : ficr[8].value, ++ ficr[9].value, ++ ficr[10].value, ficr[11].value, ++ ficr[12].value, ficr[13].value, ficr[14].value, ficr[15].value, ++ ficr[16].value, ficr[17].value, ficr[18].value, ficr[19].value, ++ ficr[20].value, ++ ficr[21].value, ficr[22].value); ++ ++ return ERROR_OK; ++} ++ ++static const struct command_registration nrf52_exec_command_handlers[] = { ++ { ++ .name = "mass_erase", ++ .handler = nrf52_handle_mass_erase_command, ++ .mode = COMMAND_EXEC, ++ .help = "Erase all flash contents of the chip.", ++ }, ++ COMMAND_REGISTRATION_DONE ++}; ++ ++static const struct command_registration nrf52_command_handlers[] = { ++ { ++ .name = "nrf52", ++ .mode = COMMAND_ANY, ++ .help = "nrf52 flash command group", ++ .usage = "", ++ .chain = nrf52_exec_command_handlers, ++ }, ++ COMMAND_REGISTRATION_DONE ++}; ++ ++struct flash_driver nrf52_flash = { ++ .name = "nrf52", ++ .commands = nrf52_command_handlers, ++ .flash_bank_command = nrf52_flash_bank_command, ++ .info = nrf52_info, ++ .erase = nrf52_erase, ++ .protect = nrf52_protect, ++ .write = nrf52_write, ++ .read = default_flash_read, ++ .probe = nrf52_probe, ++ .auto_probe = nrf52_auto_probe, ++ .erase_check = default_flash_blank_check, ++ .protect_check = nrf52_protect_check, ++}; +diff --git a/tcl/target/nrf52.cfg b/tcl/target/nrf52.cfg +index c1cbf1a..c4ba167 100644 +--- a/tcl/target/nrf52.cfg ++++ b/tcl/target/nrf52.cfg +@@ -16,11 +16,24 @@ if { [info exists CPUTAPID] } { + set _CPUTAPID 0x2ba01477 + } + ++# Work-area is a space in RAM used for flash programming ++# By default use 16kB ++if { [info exists WORKAREASIZE] } { ++ set _WORKAREASIZE $WORKAREASIZE ++} else { ++ set _WORKAREASIZE 0x4000 ++} ++ + swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID + + set _TARGETNAME $_CHIPNAME.cpu + target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME + ++$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 ++ ++flash bank $_CHIPNAME.flash nrf52 0x00000000 0 1 1 $_TARGETNAME ++flash bank $_CHIPNAME.uicr nrf52 0x10001000 0 1 1 $_TARGETNAME ++ + adapter_khz 10000 + + if { ![using_hla] } { -- 2.10.1 ^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [PATCH 3/3] gnu: Add openocd. 2016-10-25 13:26 ` [PATCH 3/3] gnu: Add openocd Theodoros Foradis @ 2016-10-26 12:49 ` David Craven 2016-10-26 21:08 ` [PATCH v2 0/3] gnu: Add gdb-arm-none-eabi and openocd Theodoros Foradis 0 siblings, 1 reply; 29+ messages in thread From: David Craven @ 2016-10-26 12:49 UTC (permalink / raw) To: Theodoros Foradis; +Cc: guix-devel Hi Theodoros, Do we really need this patch? Is there a reason why it hasn't been upstreamed yet? (add-before 'configure 'bootstrap + (lambda _ + (system* "aclocal") + (system* "libtoolize" "--automake" "--copy") + (system* "autoconf") + (system* "autoheader") + (system* "automake" "--gnu" "--add-missing" "--copy") + #t)) Why not (add-before 'configure 'autoreconf (lambda _ (zero? (system* "autoreconf" "-vfi")) I prefer indenting like this as is done in most of the codebase: + (inputs `(("libusb" ,libusb) + ("libusb-compat" ,libusb-compat) + ("libftdi" ,libftdi) + ("hidapi" ,hidapi))) + (native-inputs `(("autoconf" ,autoconf) + ("libtool" ,libtool) + ("automake" ,automake) + ("pkg-config" ,pkg-config))) It would also be nice if the inputs where ordered alphabetically. Thanks for the patch, looking good!! You don't need to resubmit (unless someone else has more objections :). David ^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH v2 0/3] gnu: Add gdb-arm-none-eabi and openocd. 2016-10-26 12:49 ` David Craven @ 2016-10-26 21:08 ` Theodoros Foradis 2016-10-26 21:08 ` [PATCH v2 1/3] gnu: Add gdb-arm-none-eabi Theodoros Foradis ` (2 more replies) 0 siblings, 3 replies; 29+ messages in thread From: Theodoros Foradis @ 2016-10-26 21:08 UTC (permalink / raw) To: guix-devel Hello Dadiv, I am posting a version 2 of the patch series, making the changes you suggested for hidapi plus the following. The git commit was changed to a more recent one. A guix package revision was added, for future package updates. David Craven writes: > Hi Theodoros, > > Do we really need this patch? Is there a reason why it hasn't been > upstreamed yet? > I updated the patch for nrf52 support, to the version which has been tested, and is reviewd to go in master as well. Additional info, in the patch header. This patch is not needed for openocd to work. It adds support for a board I am using, and since it's been tested, I think it's nice to have in guix. > (add-before 'configure 'bootstrap > + (lambda _ > + (system* "aclocal") > + (system* "libtoolize" "--automake" "--copy") > + (system* "autoconf") > + (system* "autoheader") > + (system* "automake" "--gnu" "--add-missing" "--copy") > + #t)) > > Why not (add-before 'configure 'autoreconf > (lambda _ > (zero? (system* "autoreconf" "-vfi")) > fixed > I prefer indenting like this as is done in most of the codebase: > > + (inputs > `(("libusb" ,libusb) > + ("libusb-compat" ,libusb-compat) > + ("libftdi" ,libftdi) > + ("hidapi" ,hidapi))) > + (native-inputs > `(("autoconf" ,autoconf) > + ("libtool" ,libtool) > + ("automake" ,automake) > + ("pkg-config" ,pkg-config))) > fixed > It would also be nice if the inputs where ordered alphabetically. > done > Thanks for the patch, looking good!! You don't need to resubmit > (unless someone else has more objections :). > > David Thanks for your input. Theodoros Foradis (3): gnu: Add gdb-arm-none-eabi. gnu: Add hidapi. gnu: Add openocd. gnu/local.mk | 2 + gnu/packages/embedded.scm | 83 +++++++++ gnu/packages/hidapi.scm | 63 +++++++ gnu/packages/patches/openocd-nrf52.patch | 843 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 991 insertions(+) -- Theodoros Foradis ^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH v2 1/3] gnu: Add gdb-arm-none-eabi. 2016-10-26 21:08 ` [PATCH v2 0/3] gnu: Add gdb-arm-none-eabi and openocd Theodoros Foradis @ 2016-10-26 21:08 ` Theodoros Foradis 2016-10-26 21:08 ` [PATCH v2 2/3] gnu: Add hidapi Theodoros Foradis 2016-10-26 21:08 ` [PATCH v2 3/3] gnu: Add openocd Theodoros Foradis 2 siblings, 0 replies; 29+ messages in thread From: Theodoros Foradis @ 2016-10-26 21:08 UTC (permalink / raw) To: guix-devel * gnu/packages/embedded.scm (gdb-arm-none-eabi): New variable. --- gnu/packages/embedded.scm | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/gnu/packages/embedded.scm b/gnu/packages/embedded.scm index a7af69f..0b4f9ab 100644 --- a/gnu/packages/embedded.scm +++ b/gnu/packages/embedded.scm @@ -31,6 +31,7 @@ #:use-module (gnu packages cross-base) #:use-module (gnu packages flex) #:use-module (gnu packages gcc) + #:use-module (gnu packages gdb) #:use-module (gnu packages perl) #:use-module (gnu packages texinfo)) @@ -223,3 +224,15 @@ languages are C and C++.") (define-public arm-none-eabi-nano-toolchain-6 (arm-none-eabi-toolchain gcc-arm-none-eabi-6 newlib-nano-arm-none-eabi)) + +(define-public gdb-arm-none-eabi + (package + (inherit gdb) + (name "gdb-arm-none-eabi") + (arguments + `(#:configure-flags '("--target=arm-none-eabi" + "--enable-multilib" + "--enable-interwork" + "--enable-languages=c,c++" + "--disable-nls") + ,@(package-arguments gdb))))) -- 2.10.1 ^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v2 2/3] gnu: Add hidapi. 2016-10-26 21:08 ` [PATCH v2 0/3] gnu: Add gdb-arm-none-eabi and openocd Theodoros Foradis 2016-10-26 21:08 ` [PATCH v2 1/3] gnu: Add gdb-arm-none-eabi Theodoros Foradis @ 2016-10-26 21:08 ` Theodoros Foradis 2016-10-28 6:19 ` Ricardo Wurmus 2016-10-26 21:08 ` [PATCH v2 3/3] gnu: Add openocd Theodoros Foradis 2 siblings, 1 reply; 29+ messages in thread From: Theodoros Foradis @ 2016-10-26 21:08 UTC (permalink / raw) To: guix-devel * gnu/packages/hidapi.scm: New file. * gnu/local.mk (GNU_SYSTEM_MODULES): Add it. --- gnu/local.mk | 1 + gnu/packages/hidapi.scm | 63 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 64 insertions(+) create mode 100644 gnu/packages/hidapi.scm diff --git a/gnu/local.mk b/gnu/local.mk index ff2d976..9019b98 100644 --- a/gnu/local.mk +++ b/gnu/local.mk @@ -178,6 +178,7 @@ GNU_SYSTEM_MODULES = \ %D%/packages/gxmessage.scm \ %D%/packages/haskell.scm \ %D%/packages/hexedit.scm \ + %D%/packages/hidapi.scm \ %D%/packages/hugs.scm \ %D%/packages/hurd.scm \ %D%/packages/ibus.scm \ diff --git a/gnu/packages/hidapi.scm b/gnu/packages/hidapi.scm new file mode 100644 index 0000000..88e5eba --- /dev/null +++ b/gnu/packages/hidapi.scm @@ -0,0 +1,63 @@ +;;; GNU Guix --- Functional package management for GNU +;;; Copyright © 2016 Theodoros Foradis <theodoros.for@openmailbox.org> +;;; +;;; This file is part of GNU Guix. +;;; +;;; GNU Guix is free software; you can redistribute it and/or modify it +;;; under the terms of the GNU General Public License as published by +;;; the Free Software Foundation; either version 3 of the License, or (at +;;; your option) any later version. +;;; +;;; GNU Guix is distributed in the hope that it will be useful, but +;;; WITHOUT ANY WARRANTY; without even the implied warranty of +;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;;; GNU General Public License for more details. +;;; +;;; You should have received a copy of the GNU General Public License +;;; along with GNU Guix. If not, see <http://www.gnu.org/licenses/>. + +(define-module (gnu packages hidapi) + #:use-module (guix packages) + #:use-module (guix download) + #:use-module ((guix licenses) #:prefix license:) + #:use-module (guix build-system gnu) + #:use-module (gnu packages) + #:use-module (gnu packages autotools) + #:use-module (gnu packages libusb) + #:use-module (gnu packages linux) + #:use-module (gnu packages pkg-config)) + +(define-public hidapi + (package + (name "hidapi") + (version "0.8.0-rc1") + (source (origin + (method url-fetch) + (uri (string-append "https://github.com/signal11/hidapi/archive/hidapi-" + version ".tar.gz")) + (sha256 + (base32 + "0qdgyj9rgb7n0nk3ghfswrhzzknxqn4ibn3wj8g4r828pw07451w")))) + (build-system gnu-build-system) + (arguments + '(#:phases + (modify-phases %standard-phases + (add-before 'configure 'bootstrap + (lambda _ + (zero? (system* "autoreconf" "-vfi"))))))) + (inputs + `(("libusb" ,libusb) + ("udev" ,eudev))) + (native-inputs + `(("autoconf" ,autoconf) + ("automake" ,automake) + ("libtool" ,libtool) + ("pkg-config" ,pkg-config))) + (home-page "http://www.signal11.us/oss/hidapi/") + (synopsis "HID API library") + (description + "HIDAPI is a library which allows an application to interface with USB and Bluetooth + HID-Class devices.") + (license (list license:gpl3 ;HIDAPI can be used under one of three licenses. + license:bsd-3 + license:non-copyleft)))) ;LICENSE-orig.txt - permissive license -- 2.10.1 ^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [PATCH v2 2/3] gnu: Add hidapi. 2016-10-26 21:08 ` [PATCH v2 2/3] gnu: Add hidapi Theodoros Foradis @ 2016-10-28 6:19 ` Ricardo Wurmus 2016-10-28 15:35 ` Theodoros Foradis 0 siblings, 1 reply; 29+ messages in thread From: Ricardo Wurmus @ 2016-10-28 6:19 UTC (permalink / raw) To: Theodoros Foradis; +Cc: guix-devel Theodoros Foradis <theodoros.for@openmailbox.org> writes: > * gnu/packages/hidapi.scm: New file. > * gnu/local.mk (GNU_SYSTEM_MODULES): Add it. > --- > gnu/local.mk | 1 + > gnu/packages/hidapi.scm | 63 +++++++++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 64 insertions(+) > create mode 100644 gnu/packages/hidapi.scm > > diff --git a/gnu/local.mk b/gnu/local.mk > index ff2d976..9019b98 100644 > --- a/gnu/local.mk > +++ b/gnu/local.mk > @@ -178,6 +178,7 @@ GNU_SYSTEM_MODULES = \ > %D%/packages/gxmessage.scm \ > %D%/packages/haskell.scm \ > %D%/packages/hexedit.scm \ > + %D%/packages/hidapi.scm \ > %D%/packages/hugs.scm \ > %D%/packages/hurd.scm \ > %D%/packages/ibus.scm \ > diff --git a/gnu/packages/hidapi.scm b/gnu/packages/hidapi.scm > new file mode 100644 > index 0000000..88e5eba > --- /dev/null > +++ b/gnu/packages/hidapi.scm > @@ -0,0 +1,63 @@ > +;;; GNU Guix --- Functional package management for GNU > +;;; Copyright © 2016 Theodoros Foradis <theodoros.for@openmailbox.org> > +;;; > +;;; This file is part of GNU Guix. > +;;; > +;;; GNU Guix is free software; you can redistribute it and/or modify it > +;;; under the terms of the GNU General Public License as published by > +;;; the Free Software Foundation; either version 3 of the License, or (at > +;;; your option) any later version. > +;;; > +;;; GNU Guix is distributed in the hope that it will be useful, but > +;;; WITHOUT ANY WARRANTY; without even the implied warranty of > +;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > +;;; GNU General Public License for more details. > +;;; > +;;; You should have received a copy of the GNU General Public License > +;;; along with GNU Guix. If not, see <http://www.gnu.org/licenses/>. > + > +(define-module (gnu packages hidapi) > + #:use-module (guix packages) > + #:use-module (guix download) > + #:use-module ((guix licenses) #:prefix license:) > + #:use-module (guix build-system gnu) > + #:use-module (gnu packages) > + #:use-module (gnu packages autotools) > + #:use-module (gnu packages libusb) > + #:use-module (gnu packages linux) > + #:use-module (gnu packages pkg-config)) > + > +(define-public hidapi > + (package > + (name "hidapi") > + (version "0.8.0-rc1") > + (source (origin > + (method url-fetch) > + (uri (string-append "https://github.com/signal11/hidapi/archive/hidapi-" > + version ".tar.gz")) > + (sha256 > + (base32 > + "0qdgyj9rgb7n0nk3ghfswrhzzknxqn4ibn3wj8g4r828pw07451w")))) > + (build-system gnu-build-system) > + (arguments > + '(#:phases > + (modify-phases %standard-phases > + (add-before 'configure 'bootstrap > + (lambda _ > + (zero? (system* "autoreconf" "-vfi"))))))) > + (inputs > + `(("libusb" ,libusb) > + ("udev" ,eudev))) > + (native-inputs > + `(("autoconf" ,autoconf) > + ("automake" ,automake) > + ("libtool" ,libtool) > + ("pkg-config" ,pkg-config))) > + (home-page "http://www.signal11.us/oss/hidapi/") > + (synopsis "HID API library") > + (description > + "HIDAPI is a library which allows an application to interface with USB and Bluetooth > + HID-Class devices.") There should be no indentation for the continuing line starting with “HID-Class”. I wonder, should this rather go to “libusb.scm”? Having a separate module just for this one package seems a little excessive :) > + (license (list license:gpl3 ;HIDAPI can be used under one of > three licenses. I’d move the comment above the “license” field because it doesn’t apply to the GPL in particular. > + license:bsd-3 > + license:non-copyleft)))) ;LICENSE-orig.txt - permissive license “non-copyleft” takes at least one argument. In this case this would be (license:non-copyleft "file://LICENCE-orig.txt") There’s no need to mention that it’s a “permissive” (or “push-over”) license, because that’s what non-copyleft already states. ~~ Ricardo ^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 2/3] gnu: Add hidapi. 2016-10-28 6:19 ` Ricardo Wurmus @ 2016-10-28 15:35 ` Theodoros Foradis 0 siblings, 0 replies; 29+ messages in thread From: Theodoros Foradis @ 2016-10-28 15:35 UTC (permalink / raw) To: Guix-devel Ricardo Wurmus writes: > Theodoros Foradis <theodoros.for@openmailbox.org> writes: > >> * gnu/packages/hidapi.scm: New file. >> * gnu/local.mk (GNU_SYSTEM_MODULES): Add it. >> --- >> gnu/local.mk | 1 + >> gnu/packages/hidapi.scm | 63 +++++++++++++++++++++++++++++++++++++++++++++++++ >> 2 files changed, 64 insertions(+) >> create mode 100644 gnu/packages/hidapi.scm >> >> diff --git a/gnu/local.mk b/gnu/local.mk >> index ff2d976..9019b98 100644 >> --- a/gnu/local.mk >> +++ b/gnu/local.mk >> @@ -178,6 +178,7 @@ GNU_SYSTEM_MODULES = \ >> %D%/packages/gxmessage.scm \ >> %D%/packages/haskell.scm \ >> %D%/packages/hexedit.scm \ >> + %D%/packages/hidapi.scm \ >> %D%/packages/hugs.scm \ >> %D%/packages/hurd.scm \ >> %D%/packages/ibus.scm \ >> diff --git a/gnu/packages/hidapi.scm b/gnu/packages/hidapi.scm >> new file mode 100644 >> index 0000000..88e5eba >> --- /dev/null >> +++ b/gnu/packages/hidapi.scm >> @@ -0,0 +1,63 @@ >> +;;; GNU Guix --- Functional package management for GNU >> +;;; Copyright © 2016 Theodoros Foradis <theodoros.for@openmailbox.org> >> +;;; >> +;;; This file is part of GNU Guix. >> +;;; >> +;;; GNU Guix is free software; you can redistribute it and/or modify it >> +;;; under the terms of the GNU General Public License as published by >> +;;; the Free Software Foundation; either version 3 of the License, or (at >> +;;; your option) any later version. >> +;;; >> +;;; GNU Guix is distributed in the hope that it will be useful, but >> +;;; WITHOUT ANY WARRANTY; without even the implied warranty of >> +;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> +;;; GNU General Public License for more details. >> +;;; >> +;;; You should have received a copy of the GNU General Public License >> +;;; along with GNU Guix. If not, see <http://www.gnu.org/licenses/>. >> + >> +(define-module (gnu packages hidapi) >> + #:use-module (guix packages) >> + #:use-module (guix download) >> + #:use-module ((guix licenses) #:prefix license:) >> + #:use-module (guix build-system gnu) >> + #:use-module (gnu packages) >> + #:use-module (gnu packages autotools) >> + #:use-module (gnu packages libusb) >> + #:use-module (gnu packages linux) >> + #:use-module (gnu packages pkg-config)) >> + >> +(define-public hidapi >> + (package >> + (name "hidapi") >> + (version "0.8.0-rc1") >> + (source (origin >> + (method url-fetch) >> + (uri (string-append "https://github.com/signal11/hidapi/archive/hidapi-" >> + version ".tar.gz")) >> + (sha256 >> + (base32 >> + "0qdgyj9rgb7n0nk3ghfswrhzzknxqn4ibn3wj8g4r828pw07451w")))) >> + (build-system gnu-build-system) >> + (arguments >> + '(#:phases >> + (modify-phases %standard-phases >> + (add-before 'configure 'bootstrap >> + (lambda _ >> + (zero? (system* "autoreconf" "-vfi"))))))) >> + (inputs >> + `(("libusb" ,libusb) >> + ("udev" ,eudev))) >> + (native-inputs >> + `(("autoconf" ,autoconf) >> + ("automake" ,automake) >> + ("libtool" ,libtool) >> + ("pkg-config" ,pkg-config))) >> + (home-page "http://www.signal11.us/oss/hidapi/") >> + (synopsis "HID API library") >> + (description >> + "HIDAPI is a library which allows an application to interface with USB and Bluetooth >> + HID-Class devices.") > > There should be no indentation for the continuing line starting with > “HID-Class”. > Ok. > I wonder, should this rather go to “libusb.scm”? Having a separate > module just for this one package seems a little excessive :) > I wondered this as well, I can move is to libusb, if it's more appropriate. >> + (license (list license:gpl3 ;HIDAPI can be used under one of >> three licenses. > > I’d move the comment above the “license” field because it doesn’t apply > to the GPL in particular. Ok. > >> + license:bsd-3 >> + license:non-copyleft)))) ;LICENSE-orig.txt - permissive license > > “non-copyleft” takes at least one argument. In this case this would be > > (license:non-copyleft "file://LICENCE-orig.txt") > > There’s no need to mention that it’s a “permissive” (or “push-over”) > license, because that’s what non-copyleft already states. > > ~~ Ricardo Thanks, I'll fix that as well. -- Theodoros Foradis ^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH v2 3/3] gnu: Add openocd. 2016-10-26 21:08 ` [PATCH v2 0/3] gnu: Add gdb-arm-none-eabi and openocd Theodoros Foradis 2016-10-26 21:08 ` [PATCH v2 1/3] gnu: Add gdb-arm-none-eabi Theodoros Foradis 2016-10-26 21:08 ` [PATCH v2 2/3] gnu: Add hidapi Theodoros Foradis @ 2016-10-26 21:08 ` Theodoros Foradis 2016-10-27 6:24 ` Efraim Flashner 2016-10-28 6:14 ` Ricardo Wurmus 2 siblings, 2 replies; 29+ messages in thread From: Theodoros Foradis @ 2016-10-26 21:08 UTC (permalink / raw) To: guix-devel * gnu/packages/embedded.scm (openocd): New variable. * gnu/packages/patches/openocd-nrf52.patch: New file. * gnu/local.mk (dist_patch_DATA): Add the patch. --- gnu/local.mk | 1 + gnu/packages/embedded.scm | 70 +++ gnu/packages/patches/openocd-nrf52.patch | 843 +++++++++++++++++++++++++++++++ 3 files changed, 914 insertions(+) create mode 100644 gnu/packages/patches/openocd-nrf52.patch diff --git a/gnu/local.mk b/gnu/local.mk index 9019b98..b2db850 100644 --- a/gnu/local.mk +++ b/gnu/local.mk @@ -742,6 +742,7 @@ dist_patch_DATA = \ %D%/packages/patches/openjpeg-CVE-2016-5157.patch \ %D%/packages/patches/openjpeg-CVE-2016-7163.patch \ %D%/packages/patches/openjpeg-use-after-free-fix.patch \ + %D%/packages/patches/openocd-nrf52.patch \ %D%/packages/patches/openssh-memory-exhaustion.patch \ %D%/packages/patches/openssl-runpath.patch \ %D%/packages/patches/openssl-1.1.0-c-rehash-in.patch \ diff --git a/gnu/packages/embedded.scm b/gnu/packages/embedded.scm index 0b4f9ab..f65523d 100644 --- a/gnu/packages/embedded.scm +++ b/gnu/packages/embedded.scm @@ -28,11 +28,16 @@ #:use-module (guix build-system trivial) #:use-module (guix build utils) #:use-module (gnu packages) + #:use-module (gnu packages autotools) #:use-module (gnu packages cross-base) #:use-module (gnu packages flex) #:use-module (gnu packages gcc) #:use-module (gnu packages gdb) + #:use-module (gnu packages hidapi) + #:use-module (gnu packages libftdi) + #:use-module (gnu packages libusb) #:use-module (gnu packages perl) + #:use-module (gnu packages pkg-config) #:use-module (gnu packages texinfo)) ;; We must not use the released GCC sources here, because the cross-compiler @@ -236,3 +241,68 @@ languages are C and C++.") "--enable-languages=c,c++" "--disable-nls") ,@(package-arguments gdb))))) + +;; We build openocd from git, because the JTAG library libjaylink +;; is not included in tarball releases. +(define-public openocd + (let* ((commit "674141e8a7a6413cb803d90c2a20150260015f81") + (revision "1")) + (package + (name "openocd") + (version (string-append "0.9.0-" revision "." + (string-take commit 7))) + (source (origin + (method git-fetch) + (uri (git-reference + (url (string-append "git://git.code.sf.net/p/" name "/code.git")) + (commit commit) + (recursive? #t))) + (sha256 + (base32 "0p8rcqhkx3f29j08w33fkp8xnzj4xxa41lzdfq5wd1i4x8s07s0p")) + (file-name (string-append name "-" version "-checkout.tar.xz")) + (patches + (search-patches "openocd-nrf52.patch")))) + (build-system gnu-build-system) + (arguments + '(#:configure-flags + (append (list "--disable-werror") + (map (lambda (programmer) + (string-append "--enable-" programmer)) + '("amtjtagaccel" "armjtagew" "buspirate" "ftdi" + "gw16012" "jlink" "oocd_trace" "opendous" "osbdm" + "parport" "aice" "cmsis-dap" "dummy" "jtag_vpi" "remote-bitbang" + "rlink" "stlink" "ti-icdi" "ulink" "usbprog" "vsllink" + "usb-blaster-2" "usb_blaster" "presto" "openjtag"))) + #:phases + (modify-phases %standard-phases + (add-before 'configure 'autoreconf + (lambda _ + (zero? (system* "autoreconf" "-vfi")))) + (add-after 'autoreconf 'patch-configure + (lambda _ + (substitute* "configure" + (("SHELL = /bin/sh") (string-append "SHELL = " (which "sh")))) + (substitute* "configure" + (("srcdir/src/jtag/drivers/libjaylink/configure.gnu") + (string-append "echo -e '#!" (which "sh") "\nexec \"`dirname \"'\\$'0\"` +/configure\" --enable-subproject-build \"'\\$'@\"' > \" +$srcdir/src/jtag/drivers/libjaylink/configure.gnu\""))) + #t))))) + (inputs + `(("hidapi" ,hidapi) + ("libftdi" ,libftdi) + ("libusb" ,libusb) + ("libusb-compat" ,libusb-compat))) + (native-inputs + `(("autoconf" ,autoconf) + ("automake" ,automake) + ("libtool" ,libtool) + ("pkg-config" ,pkg-config))) + (home-page "http://openocd.org") + (synopsis "Open On-Chip Debugger") + (description + "OpenOCD provides on-chip programming and debugging support with a +layered architecture of JTAG interface and TAP support.") + (license (list license:gpl2 ;; openocd and git2cl submodule + license:gpl2+ ;; libjaylink submodule + license:bsd-2))))) ;; jimctl submodule diff --git a/gnu/packages/patches/openocd-nrf52.patch b/gnu/packages/patches/openocd-nrf52.patch new file mode 100644 index 0000000..d136735 --- /dev/null +++ b/gnu/packages/patches/openocd-nrf52.patch @@ -0,0 +1,843 @@ +This patch adds support for nRF52 series devices. It is patchset 7 from +http://openocd.zylin.com/#/c/3511/ , which has been tested, but not +merged yet in master. + +From: Michael Dietz <mjdietzx@gmail.com> +Date: Mon, 30 May 2016 12:50:44 +0000 (-0700) +Subject: Added support for nRF52 Series Devices. +X-Git-Url: http://openocd.zylin.com/gitweb?p=openocd.git;a=commitdiff_plain;h=9ba15633e221d9d72e320372ba8f49d3f30d4bce + +Added support for nRF52 Series Devices. + +Both nrf52.c and nrf52.cfg are based off of previous nRF51 files. +- Some possible race conditions with NVMC have been fixed in nRF52.c +- Removed nrf51_get_probed_chip_if_halted() as the core does not have to be halted to perform operations where it is called. +- Only registers that are needed by openOCD are defined, some registers in nRF51 don't exist in nRF52 and are removed. +- Some all around cleanup has been done. +- The protection mechanism is completely different on nRF52 and this has not been implemented yet - just prints a warning and returns for now. + +Change-Id: I4dd42c86f33f450709bb981806c2655f04aa6201 +Signed-off-by: Michael Dietz <mjdietzx@gmail.com> +--- + +diff --git a/src/flash/nor/Makefile.am b/src/flash/nor/Makefile.am +index c167e8f..b6a2be3 100644 +--- a/src/flash/nor/Makefile.am ++++ b/src/flash/nor/Makefile.am +@@ -37,6 +37,7 @@ NOR_DRIVERS = \ + niietcm4.c \ + non_cfi.c \ + nrf51.c \ ++ nrf52.c \ + numicro.c \ + ocl.c \ + pic32mx.c \ +diff --git a/src/flash/nor/drivers.c b/src/flash/nor/drivers.c +index 56a5cb2..3e071bd 100644 +--- a/src/flash/nor/drivers.c ++++ b/src/flash/nor/drivers.c +@@ -48,6 +48,7 @@ extern struct flash_driver mdr_flash; + extern struct flash_driver mrvlqspi_flash; + extern struct flash_driver niietcm4_flash; + extern struct flash_driver nrf51_flash; ++extern struct flash_driver nrf52_flash; + extern struct flash_driver numicro_flash; + extern struct flash_driver ocl_flash; + extern struct flash_driver pic32mx_flash; +@@ -100,6 +101,7 @@ static struct flash_driver *flash_drivers[] = { + &mrvlqspi_flash, + &niietcm4_flash, + &nrf51_flash, ++ &nrf52_flash, + &numicro_flash, + &ocl_flash, + &pic32mx_flash, +diff --git a/src/flash/nor/nrf52.c b/src/flash/nor/nrf52.c +new file mode 100644 +index 0000000..7f2bd35 +--- /dev/null ++++ b/src/flash/nor/nrf52.c +@@ -0,0 +1,733 @@ ++/*************************************************************************** ++ * Copyright (C) 2013 Synapse Product Development * ++ * Andrey Smirnov <andrew.smironv@gmail.com> * ++ * Angus Gratton <gus@projectgus.com> * ++ * Erdem U. Altunyurt <spamjunkeater@gmail.com> * ++ * * ++ * This program is free software; you can redistribute it and/or modify * ++ * it under the terms of the GNU General Public License as published by * ++ * the Free Software Foundation; either version 2 of the License, or * ++ * (at your option) any later version. * ++ * * ++ * This program is distributed in the hope that it will be useful, * ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of * ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * ++ * GNU General Public License for more details. * ++ * * ++ * You should have received a copy of the GNU General Public License * ++ * along with this program. If not, see <http://www.gnu.org/licenses/>. * ++ ***************************************************************************/ ++ ++#ifdef HAVE_CONFIG_H ++#include "config.h" ++#endif ++ ++#include <stdlib.h> ++ ++#include "imp.h" ++#include <target/algorithm.h> ++#include <target/armv7m.h> ++#include <helper/types.h> ++ ++/* nRF52 Register addresses used by openOCD. */ ++#define NRF52_FLASH_BASE_ADDR (0x0) ++ ++#define NRF52_FICR_BASE_ADDR (0x10000000) ++#define NRF52_FICR_CODEPAGESIZE_ADDR (NRF52_FICR_BASE_ADDR | 0x010) ++#define NRF52_FICR_CODESIZE_ADDR (NRF52_FICR_BASE_ADDR | 0x014) ++ ++#define NRF52_UICR_BASE_ADDR (0x10001000) ++ ++#define NRF52_NVMC_BASE_ADDR (0x4001E000) ++#define NRF52_NVMC_READY_ADDR (NRF52_NVMC_BASE_ADDR | 0x400) ++#define NRF52_NVMC_CONFIG_ADDR (NRF52_NVMC_BASE_ADDR | 0x504) ++#define NRF52_NVMC_ERASEPAGE_ADDR (NRF52_NVMC_BASE_ADDR | 0x508) ++#define NRF52_NVMC_ERASEALL_ADDR (NRF52_NVMC_BASE_ADDR | 0x50C) ++#define NRF52_NVMC_ERASEUICR_ADDR (NRF52_NVMC_BASE_ADDR | 0x514) ++ ++/* nRF52 bit fields. */ ++enum nrf52_nvmc_config_bits { ++ NRF52_NVMC_CONFIG_REN = 0x0, ++ NRF52_NVMC_CONFIG_WEN = 0x01, ++ NRF52_NVMC_CONFIG_EEN = 0x02 ++}; ++ ++enum nrf52_nvmc_ready_bits { ++ NRF52_NVMC_BUSY = 0x0, ++ NRF52_NVMC_READY = 0x01 ++}; ++ ++/* nRF52 state information. */ ++struct nrf52_info { ++ uint32_t code_page_size; /* Size of FLASH page in bytes. */ ++ uint32_t code_memory_size; /* Size of Code FLASH region in bytes. */ ++ ++ struct { ++ bool probed; ++ int (*write) (struct flash_bank *bank, ++ struct nrf52_info *chip, ++ const uint8_t *buffer, uint32_t offset, uint32_t count); ++ } bank[2]; /* There are two regions in nRF52 FLASH - Code and UICR. */ ++ struct target *target; ++}; ++ ++static int nrf52_protect_check(struct flash_bank *bank); ++ ++static int nrf52_probe(struct flash_bank *bank) ++{ ++ int res; ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ res = target_read_u32(chip->target, ++ NRF52_FICR_CODEPAGESIZE_ADDR, ++ &chip->code_page_size); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read code page size"); ++ return res; ++ } ++ ++ res = target_read_u32(chip->target, ++ NRF52_FICR_CODESIZE_ADDR, ++ &chip->code_memory_size); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read code memory size"); ++ return res; ++ } ++ ++ chip->code_memory_size = chip->code_memory_size * chip->code_page_size; ++ ++ if (bank->base == NRF52_FLASH_BASE_ADDR) { ++ bank->size = chip->code_memory_size; ++ bank->num_sectors = bank->size / chip->code_page_size; ++ bank->sectors = calloc(bank->num_sectors, ++ sizeof((bank->sectors)[0])); ++ if (!bank->sectors) ++ return ERROR_FLASH_BANK_NOT_PROBED; ++ ++ /* Fill out the sector information: All nRF51 sectors are the same size. */ ++ for (int i = 0; i < bank->num_sectors; i++) { ++ bank->sectors[i].size = chip->code_page_size; ++ bank->sectors[i].offset = i * chip->code_page_size; ++ ++ /* Mark as unknown. */ ++ bank->sectors[i].is_erased = -1; ++ bank->sectors[i].is_protected = -1; ++ } ++ ++ nrf52_protect_check(bank); ++ ++ chip->bank[0].probed = true; ++ } else { /* This is the UICR bank. */ ++ bank->size = chip->code_page_size; ++ bank->num_sectors = 1; ++ bank->sectors = calloc(bank->num_sectors, ++ sizeof((bank->sectors)[0])); ++ if (!bank->sectors) ++ return ERROR_FLASH_BANK_NOT_PROBED; ++ ++ bank->sectors[0].size = bank->size; ++ bank->sectors[0].offset = 0; ++ ++ bank->sectors[0].is_erased = -1; ++ bank->sectors[0].is_protected = -1; ++ ++ chip->bank[1].probed = true; ++ } ++ ++ return ERROR_OK; ++} ++ ++static int nrf52_bank_is_probed(struct flash_bank *bank) ++{ ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ return chip->bank[bank->bank_number].probed; ++} ++ ++static int nrf52_auto_probe(struct flash_bank *bank) ++{ ++ if (!nrf52_bank_is_probed(bank)) ++ return nrf52_probe(bank); ++ else ++ return ERROR_OK; ++} ++ ++static int nrf52_wait_for_nvmc(struct nrf52_info *chip) ++{ ++ int res; ++ uint32_t ready; ++ int timeout = 100; ++ ++ do { ++ res = target_read_u32(chip->target, NRF52_NVMC_READY_ADDR, &ready); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read NVMC_READY register"); ++ return res; ++ } ++ ++ if (ready == NRF52_NVMC_READY) ++ return ERROR_OK; ++ ++ alive_sleep(1); ++ } while (timeout--); ++ ++ LOG_DEBUG("Timed out waiting for the NVMC to be ready"); ++ return ERROR_FLASH_BUSY; ++} ++ ++static int nrf52_nvmc_erase_enable(struct nrf52_info *chip) ++{ ++ int res; ++ ++ res = nrf52_wait_for_nvmc(chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ res = target_write_u32(chip->target, ++ NRF52_NVMC_CONFIG_ADDR, ++ NRF52_NVMC_CONFIG_EEN); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to configure the NVMC for erasing"); ++ return res; ++ } ++ ++ return res; ++} ++ ++static int nrf52_nvmc_write_enable(struct nrf52_info *chip) ++{ ++ int res; ++ ++ res = nrf52_wait_for_nvmc(chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ res = target_write_u32(chip->target, ++ NRF52_NVMC_CONFIG_ADDR, ++ NRF52_NVMC_CONFIG_WEN); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to configure the NVMC for writing"); ++ return res; ++ } ++ ++ return res; ++} ++ ++static int nrf52_nvmc_read_only(struct nrf52_info *chip) ++{ ++ int res; ++ ++ res = nrf52_wait_for_nvmc(chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ res = target_write_u32(chip->target, ++ NRF52_NVMC_CONFIG_ADDR, ++ NRF52_NVMC_CONFIG_REN); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to configure the NVMC for read-only"); ++ return res; ++ } ++ ++ return res; ++} ++ ++static int nrf52_nvmc_generic_erase(struct nrf52_info *chip, ++ uint32_t erase_register, ++ uint32_t erase_value) ++{ ++ int res; ++ ++ res = nrf52_nvmc_erase_enable(chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ res = target_write_u32(chip->target, ++ erase_register, ++ erase_value); ++ if (res != ERROR_OK) ++ LOG_ERROR("Failed to write NVMC erase register"); ++ ++ return nrf52_nvmc_read_only(chip); ++} ++ ++static int nrf52_protect_check(struct flash_bank *bank) ++{ ++ LOG_WARNING("nrf52_protect_check() is not implemented for nRF52 series devices yet"); ++ return ERROR_OK; ++} ++ ++static int nrf52_protect(struct flash_bank *bank, int set, int first, int last) ++{ ++ LOG_WARNING("nrf52_protect() is not implemented for nRF52 series devices yet"); ++ return ERROR_OK; ++} ++ ++static struct flash_sector *nrf52_find_sector_by_address(struct flash_bank *bank, uint32_t address) ++{ ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ for (int i = 0; i < bank->num_sectors; i++) ++ if (bank->sectors[i].offset <= address && ++ address < (bank->sectors[i].offset + chip->code_page_size)) { ++ return &bank->sectors[i]; ++ } ++ ++ return NULL; ++} ++ ++static int nrf52_erase_all(struct nrf52_info *chip) ++{ ++ LOG_DEBUG("Erasing all non-volatile memory"); ++ return nrf52_nvmc_generic_erase(chip, ++ NRF52_NVMC_ERASEALL_ADDR, ++ 0x01); ++} ++ ++static int nrf52_erase_page(struct flash_bank *bank, ++ struct nrf52_info *chip, ++ struct flash_sector *sector) ++{ ++ int res; ++ ++ LOG_DEBUG("Erasing page at 0x%"PRIx32, sector->offset); ++ if (sector->is_protected == 1) { ++ LOG_ERROR("Cannot erase protected sector at 0x%" PRIx32, sector->offset); ++ return ERROR_FAIL; ++ } ++ ++ if (bank->base == NRF52_UICR_BASE_ADDR) { ++ res = nrf52_nvmc_generic_erase(chip, ++ NRF52_NVMC_ERASEUICR_ADDR, ++ 0x00000001); ++ } else { ++ res = nrf52_nvmc_generic_erase(chip, ++ NRF52_NVMC_ERASEPAGE_ADDR, ++ sector->offset); ++ } ++ ++ if (res == ERROR_OK) ++ sector->is_erased = 1; ++ return res; ++} ++ ++static const uint8_t nrf52_flash_write_code[] = { ++ /* See contrib/loaders/flash/cortex-m0.S */ ++ /* <wait_fifo>: */ ++ 0x0d, 0x68, /* ldr r5, [r1, #0] */ ++ 0x00, 0x2d, /* cmp r5, #0 */ ++ 0x0b, 0xd0, /* beq.n 1e <exit> */ ++ 0x4c, 0x68, /* ldr r4, [r1, #4] */ ++ 0xac, 0x42, /* cmp r4, r5 */ ++ 0xf9, 0xd0, /* beq.n 0 <wait_fifo> */ ++ 0x20, 0xcc, /* ldmia r4!, {r5} */ ++ 0x20, 0xc3, /* stmia r3!, {r5} */ ++ 0x94, 0x42, /* cmp r4, r2 */ ++ 0x01, 0xd3, /* bcc.n 18 <no_wrap> */ ++ 0x0c, 0x46, /* mov r4, r1 */ ++ 0x08, 0x34, /* adds r4, #8 */ ++ /* <no_wrap>: */ ++ 0x4c, 0x60, /* str r4, [r1, #4] */ ++ 0x04, 0x38, /* subs r0, #4 */ ++ 0xf0, 0xd1, /* bne.n 0 <wait_fifo> */ ++ /* <exit>: */ ++ 0x00, 0xbe /* bkpt 0x0000 */ ++}; ++ ++ ++/* Start a low level flash write for the specified region */ ++static int nrf52_ll_flash_write(struct nrf52_info *chip, uint32_t offset, const uint8_t *buffer, uint32_t bytes) ++{ ++ struct target *target = chip->target; ++ uint32_t buffer_size = 8192; ++ struct working_area *write_algorithm; ++ struct working_area *source; ++ uint32_t address = NRF52_FLASH_BASE_ADDR + offset; ++ struct reg_param reg_params[4]; ++ struct armv7m_algorithm armv7m_info; ++ int retval = ERROR_OK; ++ ++ LOG_DEBUG("Writing buffer to flash offset=0x%"PRIx32" bytes=0x%"PRIx32, offset, bytes); ++ assert(bytes % 4 == 0); ++ ++ /* allocate working area with flash programming code */ ++ if (target_alloc_working_area(target, sizeof(nrf52_flash_write_code), ++ &write_algorithm) != ERROR_OK) { ++ LOG_WARNING("no working area available, falling back to slow memory writes"); ++ ++ for (; bytes > 0; bytes -= 4) { ++ retval = target_write_memory(chip->target, ++ offset, 4, 1, buffer); ++ if (retval != ERROR_OK) ++ return retval; ++ ++ retval = nrf52_wait_for_nvmc(chip); ++ if (retval != ERROR_OK) ++ return retval; ++ ++ offset += 4; ++ buffer += 4; ++ } ++ ++ return ERROR_OK; ++ } ++ ++ LOG_WARNING("using fast async flash loader. This is currently supported"); ++ LOG_WARNING("only with ST-Link and CMSIS-DAP. If you have issues, add"); ++ LOG_WARNING("\"set WORKAREASIZE 0\" before sourcing nrf52.cfg to disable it"); ++ ++ retval = target_write_buffer(target, write_algorithm->address, ++ sizeof(nrf52_flash_write_code), ++ nrf52_flash_write_code); ++ if (retval != ERROR_OK) ++ return retval; ++ ++ /* memory buffer */ ++ while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) { ++ buffer_size /= 2; ++ buffer_size &= ~3UL; /* Make sure it's 4 byte aligned */ ++ if (buffer_size <= 256) { ++ /* free working area, write algorithm already allocated */ ++ target_free_working_area(target, write_algorithm); ++ ++ LOG_WARNING("No large enough working area available, can't do block memory writes"); ++ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; ++ } ++ } ++ ++ armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; ++ armv7m_info.core_mode = ARM_MODE_THREAD; ++ ++ init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* byte count */ ++ init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer start */ ++ init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* buffer end */ ++ init_reg_param(®_params[3], "r3", 32, PARAM_IN_OUT); /* target address */ ++ ++ buf_set_u32(reg_params[0].value, 0, 32, bytes); ++ buf_set_u32(reg_params[1].value, 0, 32, source->address); ++ buf_set_u32(reg_params[2].value, 0, 32, source->address + source->size); ++ buf_set_u32(reg_params[3].value, 0, 32, address); ++ ++ retval = target_run_flash_async_algorithm(target, buffer, bytes/4, 4, ++ 0, NULL, ++ 4, reg_params, ++ source->address, source->size, ++ write_algorithm->address, 0, ++ &armv7m_info); ++ ++ target_free_working_area(target, source); ++ target_free_working_area(target, write_algorithm); ++ ++ destroy_reg_param(®_params[0]); ++ destroy_reg_param(®_params[1]); ++ destroy_reg_param(®_params[2]); ++ destroy_reg_param(®_params[3]); ++ ++ return retval; ++} ++ ++/* Check and erase flash sectors in specified range, then start a low level page write. ++ start/end must be sector aligned. ++*/ ++static int nrf52_write_pages(struct flash_bank *bank, uint32_t start, uint32_t end, const uint8_t *buffer) ++{ ++ int res; ++ uint32_t offset; ++ struct flash_sector *sector; ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ assert(start % chip->code_page_size == 0); ++ assert(end % chip->code_page_size == 0); ++ ++ /* Erase all sectors */ ++ for (offset = start; offset < end; offset += chip->code_page_size) { ++ sector = nrf52_find_sector_by_address(bank, offset); ++ ++ if (sector == NULL) { ++ LOG_ERROR("Invalid sector @ 0x%08"PRIx32, offset); ++ return ERROR_FLASH_SECTOR_INVALID; ++ } ++ ++ if (sector->is_protected == 1) { ++ LOG_ERROR("Can't erase protected sector @ 0x%08"PRIx32, offset); ++ return ERROR_FAIL; ++ } ++ ++ if (sector->is_erased != 1) { /* 1 = erased, 0= not erased, -1 = unknown */ ++ res = nrf52_erase_page(bank, chip, sector); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to erase sector @ 0x%08"PRIx32, sector->offset); ++ return res; ++ } ++ } ++ sector->is_erased = 1; ++ } ++ ++ res = nrf52_nvmc_write_enable(chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ res = nrf52_ll_flash_write(chip, start, buffer, (end - start)); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to write FLASH"); ++ nrf52_nvmc_read_only(chip); ++ return res; ++ } ++ ++ return nrf52_nvmc_read_only(chip); ++} ++ ++static int nrf52_erase(struct flash_bank *bank, int first, int last) ++{ ++ int res = ERROR_OK; ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ /* For each sector to be erased */ ++ for (int s = first; s <= last && res == ERROR_OK; s++) ++ res = nrf52_erase_page(bank, chip, &bank->sectors[s]); ++ ++ return res; ++} ++ ++static int nrf52_code_flash_write(struct flash_bank *bank, ++ struct nrf52_info *chip, ++ const uint8_t *buffer, uint32_t offset, uint32_t count) ++{ ++ int res; ++ /* Need to perform reads to fill any gaps we need to preserve in the first page, ++ before the start of buffer, or in the last page, after the end of buffer */ ++ uint32_t first_page = offset / chip->code_page_size; ++ uint32_t last_page = DIV_ROUND_UP(offset+count, chip->code_page_size); ++ ++ uint32_t first_page_offset = first_page * chip->code_page_size; ++ uint32_t last_page_offset = last_page * chip->code_page_size; ++ ++ LOG_DEBUG("Padding write from 0x%08"PRIx32"-0x%08"PRIx32" as 0x%08"PRIx32"-0x%08"PRIx32, ++ offset, offset+count, first_page_offset, last_page_offset); ++ ++ uint32_t page_cnt = last_page - first_page; ++ uint8_t buffer_to_flash[page_cnt * chip->code_page_size]; ++ ++ /* Fill in any space between start of first page and start of buffer */ ++ uint32_t pre = offset - first_page_offset; ++ if (pre > 0) { ++ res = target_read_memory(bank->target, first_page_offset, 1, pre, buffer_to_flash); ++ if (res != ERROR_OK) ++ return res; ++ } ++ ++ /* Fill in main contents of buffer */ ++ memcpy(buffer_to_flash + pre, buffer, count); ++ ++ /* Fill in any space between end of buffer and end of last page */ ++ uint32_t post = last_page_offset - (offset + count); ++ if (post > 0) { ++ /* Retrieve the full row contents from Flash */ ++ res = target_read_memory(bank->target, offset + count, 1, post, buffer_to_flash + pre + count); ++ if (res != ERROR_OK) ++ return res; ++ } ++ ++ return nrf52_write_pages(bank, first_page_offset, last_page_offset, buffer_to_flash); ++} ++ ++static int nrf52_uicr_flash_write(struct flash_bank *bank, ++ struct nrf52_info *chip, ++ const uint8_t *buffer, uint32_t offset, uint32_t count) ++{ ++ int res; ++ uint32_t nrf52_uicr_size = chip->code_page_size; ++ uint8_t uicr[nrf52_uicr_size]; ++ struct flash_sector *sector = &bank->sectors[0]; ++ ++ if ((offset + count) > nrf52_uicr_size) ++ return ERROR_FAIL; ++ ++ res = target_read_memory(bank->target, NRF52_UICR_BASE_ADDR, 1, nrf52_uicr_size, uicr); ++ ++ if (res != ERROR_OK) ++ return res; ++ ++ if (sector->is_erased != 1) { ++ res = nrf52_erase_page(bank, chip, sector); ++ if (res != ERROR_OK) ++ return res; ++ } ++ ++ memcpy(&uicr[offset], buffer, count); ++ ++ res = nrf52_nvmc_write_enable(chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ res = nrf52_ll_flash_write(chip, NRF52_UICR_BASE_ADDR, uicr, nrf52_uicr_size); ++ if (res != ERROR_OK) { ++ nrf52_nvmc_read_only(chip); ++ return res; ++ } ++ ++ return nrf52_nvmc_read_only(chip); ++} ++ ++ ++static int nrf52_write(struct flash_bank *bank, const uint8_t *buffer, ++ uint32_t offset, uint32_t count) ++{ ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ return chip->bank[bank->bank_number].write(bank, chip, buffer, offset, count); ++} ++ ++ ++FLASH_BANK_COMMAND_HANDLER(nrf52_flash_bank_command) ++{ ++ static struct nrf52_info *chip; ++ ++ assert(bank != NULL); ++ ++ switch (bank->base) { ++ case NRF52_FLASH_BASE_ADDR: ++ bank->bank_number = 0; ++ break; ++ case NRF52_UICR_BASE_ADDR: ++ bank->bank_number = 1; ++ break; ++ default: ++ LOG_ERROR("Invalid bank address 0x%08" PRIx32, bank->base); ++ return ERROR_FAIL; ++ } ++ ++ if (!chip) { ++ /* Create a new chip */ ++ chip = calloc(1, sizeof(*chip)); ++ assert(chip != NULL); ++ ++ chip->target = bank->target; ++ } ++ ++ switch (bank->base) { ++ case NRF52_FLASH_BASE_ADDR: ++ chip->bank[bank->bank_number].write = nrf52_code_flash_write; ++ break; ++ case NRF52_UICR_BASE_ADDR: ++ chip->bank[bank->bank_number].write = nrf52_uicr_flash_write; ++ break; ++ } ++ ++ chip->bank[bank->bank_number].probed = false; ++ bank->driver_priv = chip; ++ ++ return ERROR_OK; ++} ++ ++COMMAND_HANDLER(nrf52_handle_mass_erase_command) ++{ ++ int res; ++ struct flash_bank *bank = NULL; ++ struct target *target = get_current_target(CMD_CTX); ++ ++ res = get_flash_bank_by_addr(target, NRF52_FLASH_BASE_ADDR, true, &bank); ++ if (res != ERROR_OK) ++ return res; ++ ++ assert(bank != NULL); ++ ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ res = nrf52_erase_all(chip); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to erase the chip"); ++ nrf52_protect_check(bank); ++ return res; ++ } ++ ++ for (int i = 0; i < bank->num_sectors; i++) ++ bank->sectors[i].is_erased = 1; ++ ++ res = nrf52_protect_check(bank); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to check chip's write protection"); ++ return res; ++ } ++ ++ res = get_flash_bank_by_addr(target, NRF52_UICR_BASE_ADDR, true, &bank); ++ if (res != ERROR_OK) ++ return res; ++ ++ bank->sectors[0].is_erased = 1; ++ ++ return ERROR_OK; ++} ++ ++static int nrf52_info(struct flash_bank *bank, char *buf, int buf_size) ++{ ++ int res; ++ uint32_t ficr[2]; ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ res = target_read_u32(chip->target, NRF52_FICR_CODEPAGESIZE_ADDR, &ficr[0]); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read NVMC_READY register"); ++ return res; ++ } ++ ++ res = target_read_u32(chip->target, NRF52_FICR_CODESIZE_ADDR, &ficr[1]); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read NVMC_READY register"); ++ return res; ++ } ++ ++ snprintf(buf, buf_size, ++ "\n--------nRF52 Series Device--------\n\n" ++ "\n[factory information control block]\n" ++ "code page size: %"PRIu32"B\n" ++ "code memory size: %"PRIu32"kB\n", ++ ficr[0], ++ (ficr[1] * ficr[0]) / 1024); ++ ++ return ERROR_OK; ++} ++ ++static const struct command_registration nrf52_exec_command_handlers[] = { ++ { ++ .name = "mass_erase", ++ .handler = nrf52_handle_mass_erase_command, ++ .mode = COMMAND_EXEC, ++ .help = "Erase all flash contents of the chip.", ++ }, ++ COMMAND_REGISTRATION_DONE ++}; ++ ++static const struct command_registration nrf52_command_handlers[] = { ++ { ++ .name = "nrf52", ++ .mode = COMMAND_ANY, ++ .help = "nrf52 flash command group", ++ .usage = "", ++ .chain = nrf52_exec_command_handlers, ++ }, ++ COMMAND_REGISTRATION_DONE ++}; ++ ++struct flash_driver nrf52_flash = { ++ .name = "nrf52", ++ .commands = nrf52_command_handlers, ++ .flash_bank_command = nrf52_flash_bank_command, ++ .info = nrf52_info, ++ .erase = nrf52_erase, ++ .protect = nrf52_protect, ++ .write = nrf52_write, ++ .read = default_flash_read, ++ .probe = nrf52_probe, ++ .auto_probe = nrf52_auto_probe, ++ .erase_check = default_flash_blank_check, ++ .protect_check = nrf52_protect_check, ++}; +diff --git a/tcl/target/nrf52.cfg b/tcl/target/nrf52.cfg +index c1cbf1a..a2567ff 100644 +--- a/tcl/target/nrf52.cfg ++++ b/tcl/target/nrf52.cfg +@@ -5,15 +5,22 @@ + source [find target/swj-dp.tcl] + + if { [info exists CHIPNAME] } { +- set _CHIPNAME $CHIPNAME ++ set _CHIPNAME $CHIPNAME + } else { +- set _CHIPNAME nrf52 ++ set _CHIPNAME nrf52 ++} ++ ++# Work-area is a space in RAM used for flash programming, by default use 16kB. ++if { [info exists WORKAREASIZE] } { ++ set _WORKAREASIZE $WORKAREASIZE ++} else { ++ set _WORKAREASIZE 0x4000 + } + + if { [info exists CPUTAPID] } { +- set _CPUTAPID $CPUTAPID ++ set _CPUTAPID $CPUTAPID + } else { +- set _CPUTAPID 0x2ba01477 ++ set _CPUTAPID 0x2ba01477 + } + + swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID +@@ -21,8 +28,15 @@ swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID + set _TARGETNAME $_CHIPNAME.cpu + target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME + +-adapter_khz 10000 ++$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +-if { ![using_hla] } { +- cortex_m reset_config sysresetreq ++if {![using_hla]} { ++ cortex_m reset_config sysresetreq + } ++ ++flash bank $_CHIPNAME.flash nrf52 0x00000000 0 1 1 $_TARGETNAME ++flash bank $_CHIPNAME.uicr nrf52 0x10001000 0 1 1 $_TARGETNAME ++ ++adapter_khz 1000 ++ ++$_TARGETNAME configure -event reset-end {} -- 2.10.1 ^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [PATCH v2 3/3] gnu: Add openocd. 2016-10-26 21:08 ` [PATCH v2 3/3] gnu: Add openocd Theodoros Foradis @ 2016-10-27 6:24 ` Efraim Flashner 2016-10-28 6:14 ` Ricardo Wurmus 1 sibling, 0 replies; 29+ messages in thread From: Efraim Flashner @ 2016-10-27 6:24 UTC (permalink / raw) To: Theodoros Foradis; +Cc: guix-devel [-- Attachment #1: Type: text/plain, Size: 5663 bytes --] On Thu, Oct 27, 2016 at 12:08:07AM +0300, Theodoros Foradis wrote: > * gnu/packages/embedded.scm (openocd): New variable. > * gnu/packages/patches/openocd-nrf52.patch: New file. > * gnu/local.mk (dist_patch_DATA): Add the patch. > --- > gnu/local.mk | 1 + > gnu/packages/embedded.scm | 70 +++ > gnu/packages/patches/openocd-nrf52.patch | 843 +++++++++++++++++++++++++++++++ > 3 files changed, 914 insertions(+) > create mode 100644 gnu/packages/patches/openocd-nrf52.patch > > diff --git a/gnu/local.mk b/gnu/local.mk > index 9019b98..b2db850 100644 > --- a/gnu/local.mk > +++ b/gnu/local.mk > @@ -742,6 +742,7 @@ dist_patch_DATA = \ > %D%/packages/patches/openjpeg-CVE-2016-5157.patch \ > %D%/packages/patches/openjpeg-CVE-2016-7163.patch \ > %D%/packages/patches/openjpeg-use-after-free-fix.patch \ > + %D%/packages/patches/openocd-nrf52.patch \ > %D%/packages/patches/openssh-memory-exhaustion.patch \ > %D%/packages/patches/openssl-runpath.patch \ > %D%/packages/patches/openssl-1.1.0-c-rehash-in.patch \ > diff --git a/gnu/packages/embedded.scm b/gnu/packages/embedded.scm > index 0b4f9ab..f65523d 100644 > --- a/gnu/packages/embedded.scm > +++ b/gnu/packages/embedded.scm > @@ -28,11 +28,16 @@ > #:use-module (guix build-system trivial) > #:use-module (guix build utils) > #:use-module (gnu packages) > + #:use-module (gnu packages autotools) > #:use-module (gnu packages cross-base) > #:use-module (gnu packages flex) > #:use-module (gnu packages gcc) > #:use-module (gnu packages gdb) > + #:use-module (gnu packages hidapi) > + #:use-module (gnu packages libftdi) > + #:use-module (gnu packages libusb) > #:use-module (gnu packages perl) > + #:use-module (gnu packages pkg-config) > #:use-module (gnu packages texinfo)) > > ;; We must not use the released GCC sources here, because the cross-compiler > @@ -236,3 +241,68 @@ languages are C and C++.") > "--enable-languages=c,c++" > "--disable-nls") > ,@(package-arguments gdb))))) > + > +;; We build openocd from git, because the JTAG library libjaylink > +;; is not included in tarball releases. > +(define-public openocd > + (let* ((commit "674141e8a7a6413cb803d90c2a20150260015f81") > + (revision "1")) > + (package > + (name "openocd") > + (version (string-append "0.9.0-" revision "." > + (string-take commit 7))) > + (source (origin > + (method git-fetch) > + (uri (git-reference > + (url (string-append "git://git.code.sf.net/p/" name "/code.git")) > + (commit commit) > + (recursive? #t))) > + (sha256 > + (base32 "0p8rcqhkx3f29j08w33fkp8xnzj4xxa41lzdfq5wd1i4x8s07s0p")) > + (file-name (string-append name "-" version "-checkout.tar.xz")) quick nit-pick, since it's a checkout it doesn't need the .tar.xz > + (patches > + (search-patches "openocd-nrf52.patch")))) > + (build-system gnu-build-system) > + (arguments > + '(#:configure-flags > + (append (list "--disable-werror") > + (map (lambda (programmer) > + (string-append "--enable-" programmer)) > + '("amtjtagaccel" "armjtagew" "buspirate" "ftdi" > + "gw16012" "jlink" "oocd_trace" "opendous" "osbdm" > + "parport" "aice" "cmsis-dap" "dummy" "jtag_vpi" "remote-bitbang" > + "rlink" "stlink" "ti-icdi" "ulink" "usbprog" "vsllink" > + "usb-blaster-2" "usb_blaster" "presto" "openjtag"))) > + #:phases > + (modify-phases %standard-phases > + (add-before 'configure 'autoreconf > + (lambda _ > + (zero? (system* "autoreconf" "-vfi")))) > + (add-after 'autoreconf 'patch-configure > + (lambda _ > + (substitute* "configure" > + (("SHELL = /bin/sh") (string-append "SHELL = " (which "sh")))) > + (substitute* "configure" > + (("srcdir/src/jtag/drivers/libjaylink/configure.gnu") > + (string-append "echo -e '#!" (which "sh") "\nexec \"`dirname \"'\\$'0\"` > +/configure\" --enable-subproject-build \"'\\$'@\"' > \" > +$srcdir/src/jtag/drivers/libjaylink/configure.gnu\""))) > + #t))))) > + (inputs > + `(("hidapi" ,hidapi) > + ("libftdi" ,libftdi) > + ("libusb" ,libusb) > + ("libusb-compat" ,libusb-compat))) > + (native-inputs > + `(("autoconf" ,autoconf) > + ("automake" ,automake) > + ("libtool" ,libtool) > + ("pkg-config" ,pkg-config))) > + (home-page "http://openocd.org") > + (synopsis "Open On-Chip Debugger") > + (description > + "OpenOCD provides on-chip programming and debugging support with a > +layered architecture of JTAG interface and TAP support.") > + (license (list license:gpl2 ;; openocd and git2cl submodule > + license:gpl2+ ;; libjaylink submodule > + license:bsd-2))))) ;; jimctl submodule -- Efraim Flashner <efraim@flashner.co.il> אפרים פלשנר GPG key = A28B F40C 3E55 1372 662D 14F7 41AA E7DC CA3D 8351 Confidentiality cannot be guaranteed on emails sent or received unencrypted [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 801 bytes --] ^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 3/3] gnu: Add openocd. 2016-10-26 21:08 ` [PATCH v2 3/3] gnu: Add openocd Theodoros Foradis 2016-10-27 6:24 ` Efraim Flashner @ 2016-10-28 6:14 ` Ricardo Wurmus 2016-10-28 17:36 ` Theodoros Foradis 1 sibling, 1 reply; 29+ messages in thread From: Ricardo Wurmus @ 2016-10-28 6:14 UTC (permalink / raw) To: Theodoros Foradis; +Cc: guix-devel Theodoros Foradis <theodoros.for@openmailbox.org> writes: > +;; We build openocd from git, because the JTAG library libjaylink > +;; is not included in tarball releases. Is there a separate release of libjaylink? Does the git version bundle libjaylink? I’d prefer packaging proper releases of libjaylink and openocd, if that’s the case. > +(define-public openocd > + (let* ((commit "674141e8a7a6413cb803d90c2a20150260015f81") > + (revision "1")) > + (package > + (name "openocd") > + (version (string-append "0.9.0-" revision "." > + (string-take commit 7))) > + (source (origin > + (method git-fetch) > + (uri (git-reference > + (url (string-append "git://git.code.sf.net/p/" name "/code.git")) > + (commit commit) > + (recursive? #t))) > + (sha256 > + (base32 "0p8rcqhkx3f29j08w33fkp8xnzj4xxa41lzdfq5wd1i4x8s07s0p")) > + (file-name (string-append name "-" version "-checkout.tar.xz")) > + (patches > + (search-patches "openocd-nrf52.patch")))) > + (build-system gnu-build-system) > + (arguments > + '(#:configure-flags > + (append (list "--disable-werror") > + (map (lambda (programmer) > + (string-append "--enable-" programmer)) > + '("amtjtagaccel" "armjtagew" "buspirate" "ftdi" > + "gw16012" "jlink" "oocd_trace" "opendous" "osbdm" > + "parport" "aice" "cmsis-dap" "dummy" "jtag_vpi" "remote-bitbang" > + "rlink" "stlink" "ti-icdi" "ulink" "usbprog" "vsllink" > + "usb-blaster-2" "usb_blaster" "presto" "openjtag"))) > + #:phases > + (modify-phases %standard-phases > + (add-before 'configure 'autoreconf > + (lambda _ > + (zero? (system* "autoreconf" "-vfi")))) > + (add-after 'autoreconf 'patch-configure > + (lambda _ > + (substitute* "configure" > + (("SHELL = /bin/sh") (string-append "SHELL = " > (which "sh")))) Is this really necessary? Or can we just pass “SHELL” as a configure flag to override? > + (substitute* "configure" > + (("srcdir/src/jtag/drivers/libjaylink/configure.gnu") > + (string-append "echo -e '#!" (which "sh") "\nexec \"`dirname \"'\\$'0\"` > +/configure\" --enable-subproject-build \"'\\$'@\"' > \" > +$srcdir/src/jtag/drivers/libjaylink/configure.gnu\""))) This isn’t clear to me. What happens here? Why is the additional configure flag needed? Could you add a comment as to the intent of this substitution? > + #t))))) > + (inputs > + `(("hidapi" ,hidapi) > + ("libftdi" ,libftdi) > + ("libusb" ,libusb) > + ("libusb-compat" ,libusb-compat))) Both libusb AND libusb-compat? > + (native-inputs > + `(("autoconf" ,autoconf) > + ("automake" ,automake) > + ("libtool" ,libtool) > + ("pkg-config" ,pkg-config))) > + (home-page "http://openocd.org") > + (synopsis "Open On-Chip Debugger") s/Open// I know that that’s what OpenOCD stands for, but everything is free software (or “open source”) in Guix anyway, so we usually don’t mention “free” or “open”. > + (description > + "OpenOCD provides on-chip programming and debugging support with a > +layered architecture of JTAG interface and TAP support.") > + (license (list license:gpl2 ;; openocd and git2cl submodule > + license:gpl2+ ;; libjaylink submodule > + license:bsd-2))))) ;; jimctl submodule Please use a single “;” for margin comments like this. > diff --git a/gnu/packages/patches/openocd-nrf52.patch b/gnu/packages/patches/openocd-nrf52.patch > new file mode 100644 > index 0000000..d136735 > --- /dev/null > +++ b/gnu/packages/patches/openocd-nrf52.patch > @@ -0,0 +1,843 @@ > +This patch adds support for nRF52 series devices. It is patchset 7 from > +http://openocd.zylin.com/#/c/3511/ , which has been tested, but not > +merged yet in master. Nitpick: please use two spaces between sentences and surround the URL in <…>, so that the space between URL and comma can be removed. ~~ Ricardo ^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 3/3] gnu: Add openocd. 2016-10-28 6:14 ` Ricardo Wurmus @ 2016-10-28 17:36 ` Theodoros Foradis 2016-10-28 17:36 ` [PATCH v3 1/3] gnu: Add gdb-arm-none-eabi Theodoros Foradis ` (2 more replies) 0 siblings, 3 replies; 29+ messages in thread From: Theodoros Foradis @ 2016-10-28 17:36 UTC (permalink / raw) To: guix-devel Ricardo Wurmus writes: > Theodoros Foradis <theodoros.for@openmailbox.org> writes: > >> +;; We build openocd from git, because the JTAG library libjaylink >> +;; is not included in tarball releases. > > Is there a separate release of libjaylink? Does the git version bundle > libjaylink? I’d prefer packaging proper releases of libjaylink and > openocd, if that’s the case. > The git version does not bundle libjaylink. It is included in a submodule. Should it be make clear in that initial comment? >> +(define-public openocd >> + (let* ((commit "674141e8a7a6413cb803d90c2a20150260015f81") >> + (revision "1")) >> + (package >> + (name "openocd") >> + (version (string-append "0.9.0-" revision "." >> + (string-take commit 7))) >> + (source (origin >> + (method git-fetch) >> + (uri (git-reference >> + (url (string-append "git://git.code.sf.net/p/" name "/code.git")) >> + (commit commit) >> + (recursive? #t))) >> + (sha256 >> + (base32 "0p8rcqhkx3f29j08w33fkp8xnzj4xxa41lzdfq5wd1i4x8s07s0p")) >> + (file-name (string-append name "-" version "-checkout.tar.xz")) >> + (patches >> + (search-patches "openocd-nrf52.patch")))) >> + (build-system gnu-build-system) >> + (arguments >> + '(#:configure-flags >> + (append (list "--disable-werror") >> + (map (lambda (programmer) >> + (string-append "--enable-" programmer)) >> + '("amtjtagaccel" "armjtagew" "buspirate" "ftdi" >> + "gw16012" "jlink" "oocd_trace" "opendous" "osbdm" >> + "parport" "aice" "cmsis-dap" "dummy" "jtag_vpi" "remote-bitbang" >> + "rlink" "stlink" "ti-icdi" "ulink" "usbprog" "vsllink" >> + "usb-blaster-2" "usb_blaster" "presto" "openjtag"))) >> + #:phases >> + (modify-phases %standard-phases >> + (add-before 'configure 'autoreconf >> + (lambda _ >> + (zero? (system* "autoreconf" "-vfi")))) >> + (add-after 'autoreconf 'patch-configure >> + (lambda _ >> + (substitute* "configure" >> + (("SHELL = /bin/sh") (string-append "SHELL = " >> (which "sh")))) > > Is this really necessary? Or can we just pass “SHELL” as a configure > flag to override? > This is in fact not necessary, and removed. >> + (substitute* "configure" >> + (("srcdir/src/jtag/drivers/libjaylink/configure.gnu") >> + (string-append "echo -e '#!" (which "sh") "\nexec \"`dirname \"'\\$'0\"` >> +/configure\" --enable-subproject-build \"'\\$'@\"' > \" >> +$srcdir/src/jtag/drivers/libjaylink/configure.gnu\""))) > > This isn’t clear to me. What happens here? Why is the additional > configure flag needed? Could you add a comment as to the intent of this > substitution? > This substitution was changed, to substitute with an empty string. The actual intention of the substitution was to replace /bin/sh in the generated configure.gnu, which proved to be unneeded, so it's just removed, and the file will be run with the correct /bin/sh. >> + #t))))) >> + (inputs >> + `(("hidapi" ,hidapi) >> + ("libftdi" ,libftdi) >> + ("libusb" ,libusb) >> + ("libusb-compat" ,libusb-compat))) > > Both libusb AND libusb-compat? > Yes, it won't build without both. >> + (native-inputs >> + `(("autoconf" ,autoconf) >> + ("automake" ,automake) >> + ("libtool" ,libtool) >> + ("pkg-config" ,pkg-config))) >> + (home-page "http://openocd.org") >> + (synopsis "Open On-Chip Debugger") > > s/Open// > > I know that that’s what OpenOCD stands for, but everything is free > software (or “open source”) in Guix anyway, so we usually don’t mention > “free” or “open”. > Understood. I removed it. >> + (description >> + "OpenOCD provides on-chip programming and debugging support with a >> +layered architecture of JTAG interface and TAP support.") >> + (license (list license:gpl2 ;; openocd and git2cl submodule >> + license:gpl2+ ;; libjaylink submodule >> + license:bsd-2))))) ;; jimctl submodule > > Please use a single “;” for margin comments like this. > Done. >> diff --git a/gnu/packages/patches/openocd-nrf52.patch b/gnu/packages/patches/openocd-nrf52.patch >> new file mode 100644 >> index 0000000..d136735 >> --- /dev/null >> +++ b/gnu/packages/patches/openocd-nrf52.patch >> @@ -0,0 +1,843 @@ >> +This patch adds support for nRF52 series devices. It is patchset 7 from >> +http://openocd.zylin.com/#/c/3511/ , which has been tested, but not >> +merged yet in master. > > Nitpick: please use two spaces between sentences and surround the URL in > <…>, so that the space between URL and comma can be removed. > > ~~ Ricardo Changed this as well. Thanks for the information, and excuse me for ignoring those conventions. I reply to this with the updated patches. Theodoros Foradis (3): gnu: Add gdb-arm-none-eabi. gnu: Add hidapi. gnu: Add openocd. gnu/local.mk | 1 + gnu/packages/embedded.scm | 77 ++++++++ gnu/packages/libusb.scm | 38 ++++ gnu/packages/patches/openocd-nrf52.patch | 843 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 959 insertions(+) -- Theodoros Foradis ^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH v3 1/3] gnu: Add gdb-arm-none-eabi. 2016-10-28 17:36 ` Theodoros Foradis @ 2016-10-28 17:36 ` Theodoros Foradis 2016-10-28 17:36 ` [PATCH v3 2/3] gnu: Add hidapi Theodoros Foradis 2016-10-28 17:36 ` [PATCH v3 3/3] gnu: Add openocd Theodoros Foradis 2 siblings, 0 replies; 29+ messages in thread From: Theodoros Foradis @ 2016-10-28 17:36 UTC (permalink / raw) To: guix-devel * gnu/packages/embedded.scm (gdb-arm-none-eabi): New variable. --- gnu/packages/embedded.scm | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/gnu/packages/embedded.scm b/gnu/packages/embedded.scm index a7af69f..0b4f9ab 100644 --- a/gnu/packages/embedded.scm +++ b/gnu/packages/embedded.scm @@ -31,6 +31,7 @@ #:use-module (gnu packages cross-base) #:use-module (gnu packages flex) #:use-module (gnu packages gcc) + #:use-module (gnu packages gdb) #:use-module (gnu packages perl) #:use-module (gnu packages texinfo)) @@ -223,3 +224,15 @@ languages are C and C++.") (define-public arm-none-eabi-nano-toolchain-6 (arm-none-eabi-toolchain gcc-arm-none-eabi-6 newlib-nano-arm-none-eabi)) + +(define-public gdb-arm-none-eabi + (package + (inherit gdb) + (name "gdb-arm-none-eabi") + (arguments + `(#:configure-flags '("--target=arm-none-eabi" + "--enable-multilib" + "--enable-interwork" + "--enable-languages=c,c++" + "--disable-nls") + ,@(package-arguments gdb))))) -- 2.10.1 ^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v3 2/3] gnu: Add hidapi. 2016-10-28 17:36 ` Theodoros Foradis 2016-10-28 17:36 ` [PATCH v3 1/3] gnu: Add gdb-arm-none-eabi Theodoros Foradis @ 2016-10-28 17:36 ` Theodoros Foradis 2016-11-09 15:45 ` Ludovic Courtès 2016-10-28 17:36 ` [PATCH v3 3/3] gnu: Add openocd Theodoros Foradis 2 siblings, 1 reply; 29+ messages in thread From: Theodoros Foradis @ 2016-10-28 17:36 UTC (permalink / raw) To: guix-devel * gnu/packages/libusb.scm (hidapi): New variable. --- gnu/packages/libusb.scm | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/gnu/packages/libusb.scm b/gnu/packages/libusb.scm index 0071f4f..fe1bed1 100644 --- a/gnu/packages/libusb.scm +++ b/gnu/packages/libusb.scm @@ -4,6 +4,7 @@ ;;; Copyright © 2015 Andy Wingo <wingo@igalia.com> ;;; Copyright © 2015, 2016 Ricardo Wurmus <rekado@elephly.net> ;;; Copyright © 2016 Efraim Flashner <efraim@flashner.co.il> +;;; Copyright © 2016 Theodoros Foradis <theodoros.for@openmailbox.org> ;;; ;;; This file is part of GNU Guix. ;;; @@ -29,6 +30,7 @@ #:use-module (guix build-system gnu) #:use-module (guix build-system glib-or-gtk) #:use-module (guix build-system python) + #:use-module (gnu packages autotools) #:use-module (gnu packages gnupg) #:use-module (gnu packages gtk) #:use-module (gnu packages linux) @@ -201,3 +203,39 @@ proposed for standardization.") (MTP), which allows media files to be transferred to and from many portable devices.") (license bsd-3))) + +(define-public hidapi + (package + (name "hidapi") + (version "0.8.0-rc1") + (source (origin + (method url-fetch) + (uri (string-append "https://github.com/signal11/hidapi/archive/hidapi-" + version ".tar.gz")) + (sha256 + (base32 + "0qdgyj9rgb7n0nk3ghfswrhzzknxqn4ibn3wj8g4r828pw07451w")))) + (build-system gnu-build-system) + (arguments + '(#:phases + (modify-phases %standard-phases + (add-before 'configure 'bootstrap + (lambda _ + (zero? (system* "autoreconf" "-vfi"))))))) + (inputs + `(("libusb" ,libusb) + ("udev" ,eudev))) + (native-inputs + `(("autoconf" ,autoconf) + ("automake" ,automake) + ("libtool" ,libtool) + ("pkg-config" ,pkg-config))) + (home-page "http://www.signal11.us/oss/hidapi/") + (synopsis "HID API library") + (description + "HIDAPI is a library which allows an application to interface with USB and Bluetooth +HID-Class devices.") + ;; HIDAPI can be used under one of three licenses. + (license (list gpl3 + bsd-3 + non-copyleft "file://LICENSE-orig.txt")))) -- 2.10.1 ^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [PATCH v3 2/3] gnu: Add hidapi. 2016-10-28 17:36 ` [PATCH v3 2/3] gnu: Add hidapi Theodoros Foradis @ 2016-11-09 15:45 ` Ludovic Courtès 0 siblings, 0 replies; 29+ messages in thread From: Ludovic Courtès @ 2016-11-09 15:45 UTC (permalink / raw) To: Theodoros Foradis; +Cc: guix-devel Theodoros Foradis <theodoros.for@openmailbox.org> skribis: > + ;; HIDAPI can be used under one of three licenses. > + (license (list gpl3 > + bsd-3 > + non-copyleft "file://LICENSE-orig.txt")))) For the record, ‘guix lint’ reports an invalid ‘license’ here because ‘non-copyleft’ is a procedure. I’m pushing a fix now. Ludo’. ^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH v3 3/3] gnu: Add openocd. 2016-10-28 17:36 ` Theodoros Foradis 2016-10-28 17:36 ` [PATCH v3 1/3] gnu: Add gdb-arm-none-eabi Theodoros Foradis 2016-10-28 17:36 ` [PATCH v3 2/3] gnu: Add hidapi Theodoros Foradis @ 2016-10-28 17:36 ` Theodoros Foradis 2016-10-30 1:40 ` David Craven 2017-02-13 19:44 ` Leo Famulari 2 siblings, 2 replies; 29+ messages in thread From: Theodoros Foradis @ 2016-10-28 17:36 UTC (permalink / raw) To: guix-devel * gnu/packages/embedded.scm (openocd): New variable. * gnu/packages/patches/openocd-nrf52.patch: New file. * gnu/local.mk (dist_patch_DATA): Add the patch. --- gnu/local.mk | 1 + gnu/packages/embedded.scm | 64 +++ gnu/packages/patches/openocd-nrf52.patch | 843 +++++++++++++++++++++++++++++++ 3 files changed, 908 insertions(+) create mode 100644 gnu/packages/patches/openocd-nrf52.patch diff --git a/gnu/local.mk b/gnu/local.mk index ff2d976..286d3af 100644 --- a/gnu/local.mk +++ b/gnu/local.mk @@ -741,6 +741,7 @@ dist_patch_DATA = \ %D%/packages/patches/openjpeg-CVE-2016-5157.patch \ %D%/packages/patches/openjpeg-CVE-2016-7163.patch \ %D%/packages/patches/openjpeg-use-after-free-fix.patch \ + %D%/packages/patches/openocd-nrf52.patch \ %D%/packages/patches/openssh-memory-exhaustion.patch \ %D%/packages/patches/openssl-runpath.patch \ %D%/packages/patches/openssl-1.1.0-c-rehash-in.patch \ diff --git a/gnu/packages/embedded.scm b/gnu/packages/embedded.scm index 0b4f9ab..f3aec81 100644 --- a/gnu/packages/embedded.scm +++ b/gnu/packages/embedded.scm @@ -28,11 +28,15 @@ #:use-module (guix build-system trivial) #:use-module (guix build utils) #:use-module (gnu packages) + #:use-module (gnu packages autotools) #:use-module (gnu packages cross-base) #:use-module (gnu packages flex) #:use-module (gnu packages gcc) #:use-module (gnu packages gdb) + #:use-module (gnu packages libftdi) + #:use-module (gnu packages libusb) #:use-module (gnu packages perl) + #:use-module (gnu packages pkg-config) #:use-module (gnu packages texinfo)) ;; We must not use the released GCC sources here, because the cross-compiler @@ -236,3 +240,63 @@ languages are C and C++.") "--enable-languages=c,c++" "--disable-nls") ,@(package-arguments gdb))))) + +;; We build openocd from git, because the JTAG library libjaylink +;; is not included in tarball releases. +(define-public openocd + (let* ((commit "674141e8a7a6413cb803d90c2a20150260015f81") + (revision "1")) + (package + (name "openocd") + (version (string-append "0.9.0-" revision "." + (string-take commit 7))) + (source (origin + (method git-fetch) + (uri (git-reference + (url (string-append "git://git.code.sf.net/p/" name "/code.git")) + (commit commit) + (recursive? #t))) + (sha256 + (base32 "0p8rcqhkx3f29j08w33fkp8xnzj4xxa41lzdfq5wd1i4x8s07s0p")) + (file-name (string-append name "-" version "-checkout")) + (patches + (search-patches "openocd-nrf52.patch")))) + (build-system gnu-build-system) + (arguments + '(#:configure-flags + (append (list "--disable-werror") + (map (lambda (programmer) + (string-append "--enable-" programmer)) + '("amtjtagaccel" "armjtagew" "buspirate" "ftdi" + "gw16012" "jlink" "oocd_trace" "opendous" "osbdm" + "parport" "aice" "cmsis-dap" "dummy" "jtag_vpi" "remote-bitbang" + "rlink" "stlink" "ti-icdi" "ulink" "usbprog" "vsllink" + "usb-blaster-2" "usb_blaster" "presto" "openjtag"))) + #:phases + (modify-phases %standard-phases + (add-before 'configure 'autoreconf + (lambda _ + (zero? (system* "autoreconf" "-vfi")))) + (add-after 'autoreconf 'patch-configure + (lambda _ + (substitute* "configure" + (("srcdir/src/jtag/drivers/libjaylink/configure.gnu") "")) + #t))))) + (inputs + `(("hidapi" ,hidapi) + ("libftdi" ,libftdi) + ("libusb" ,libusb) + ("libusb-compat" ,libusb-compat))) + (native-inputs + `(("autoconf" ,autoconf) + ("automake" ,automake) + ("libtool" ,libtool) + ("pkg-config" ,pkg-config))) + (home-page "http://openocd.org") + (synopsis "On-Chip Debugger") + (description + "OpenOCD provides on-chip programming and debugging support with a +layered architecture of JTAG interface and TAP support.") + (license (list license:gpl2 ; openocd and git2cl submodule + license:gpl2+ ; libjaylink submodule + license:bsd-2))))) ; jimctl submodule diff --git a/gnu/packages/patches/openocd-nrf52.patch b/gnu/packages/patches/openocd-nrf52.patch new file mode 100644 index 0000000..792575d --- /dev/null +++ b/gnu/packages/patches/openocd-nrf52.patch @@ -0,0 +1,843 @@ +This patch adds support for nRF52 series devices. It is patchset 7 from +<http://openocd.zylin.com/#/c/3511/>, which has been tested, but not +merged yet in master. + +From: Michael Dietz <mjdietzx@gmail.com> +Date: Mon, 30 May 2016 12:50:44 +0000 (-0700) +Subject: Added support for nRF52 Series Devices. +X-Git-Url: http://openocd.zylin.com/gitweb?p=openocd.git;a=commitdiff_plain;h=9ba15633e221d9d72e320372ba8f49d3f30d4bce + +Added support for nRF52 Series Devices. + +Both nrf52.c and nrf52.cfg are based off of previous nRF51 files. +- Some possible race conditions with NVMC have been fixed in nRF52.c +- Removed nrf51_get_probed_chip_if_halted() as the core does not have to be halted to perform operations where it is called. +- Only registers that are needed by openOCD are defined, some registers in nRF51 don't exist in nRF52 and are removed. +- Some all around cleanup has been done. +- The protection mechanism is completely different on nRF52 and this has not been implemented yet - just prints a warning and returns for now. + +Change-Id: I4dd42c86f33f450709bb981806c2655f04aa6201 +Signed-off-by: Michael Dietz <mjdietzx@gmail.com> +--- + +diff --git a/src/flash/nor/Makefile.am b/src/flash/nor/Makefile.am +index c167e8f..b6a2be3 100644 +--- a/src/flash/nor/Makefile.am ++++ b/src/flash/nor/Makefile.am +@@ -37,6 +37,7 @@ NOR_DRIVERS = \ + niietcm4.c \ + non_cfi.c \ + nrf51.c \ ++ nrf52.c \ + numicro.c \ + ocl.c \ + pic32mx.c \ +diff --git a/src/flash/nor/drivers.c b/src/flash/nor/drivers.c +index 56a5cb2..3e071bd 100644 +--- a/src/flash/nor/drivers.c ++++ b/src/flash/nor/drivers.c +@@ -48,6 +48,7 @@ extern struct flash_driver mdr_flash; + extern struct flash_driver mrvlqspi_flash; + extern struct flash_driver niietcm4_flash; + extern struct flash_driver nrf51_flash; ++extern struct flash_driver nrf52_flash; + extern struct flash_driver numicro_flash; + extern struct flash_driver ocl_flash; + extern struct flash_driver pic32mx_flash; +@@ -100,6 +101,7 @@ static struct flash_driver *flash_drivers[] = { + &mrvlqspi_flash, + &niietcm4_flash, + &nrf51_flash, ++ &nrf52_flash, + &numicro_flash, + &ocl_flash, + &pic32mx_flash, +diff --git a/src/flash/nor/nrf52.c b/src/flash/nor/nrf52.c +new file mode 100644 +index 0000000..7f2bd35 +--- /dev/null ++++ b/src/flash/nor/nrf52.c +@@ -0,0 +1,733 @@ ++/*************************************************************************** ++ * Copyright (C) 2013 Synapse Product Development * ++ * Andrey Smirnov <andrew.smironv@gmail.com> * ++ * Angus Gratton <gus@projectgus.com> * ++ * Erdem U. Altunyurt <spamjunkeater@gmail.com> * ++ * * ++ * This program is free software; you can redistribute it and/or modify * ++ * it under the terms of the GNU General Public License as published by * ++ * the Free Software Foundation; either version 2 of the License, or * ++ * (at your option) any later version. * ++ * * ++ * This program is distributed in the hope that it will be useful, * ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of * ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * ++ * GNU General Public License for more details. * ++ * * ++ * You should have received a copy of the GNU General Public License * ++ * along with this program. If not, see <http://www.gnu.org/licenses/>. * ++ ***************************************************************************/ ++ ++#ifdef HAVE_CONFIG_H ++#include "config.h" ++#endif ++ ++#include <stdlib.h> ++ ++#include "imp.h" ++#include <target/algorithm.h> ++#include <target/armv7m.h> ++#include <helper/types.h> ++ ++/* nRF52 Register addresses used by openOCD. */ ++#define NRF52_FLASH_BASE_ADDR (0x0) ++ ++#define NRF52_FICR_BASE_ADDR (0x10000000) ++#define NRF52_FICR_CODEPAGESIZE_ADDR (NRF52_FICR_BASE_ADDR | 0x010) ++#define NRF52_FICR_CODESIZE_ADDR (NRF52_FICR_BASE_ADDR | 0x014) ++ ++#define NRF52_UICR_BASE_ADDR (0x10001000) ++ ++#define NRF52_NVMC_BASE_ADDR (0x4001E000) ++#define NRF52_NVMC_READY_ADDR (NRF52_NVMC_BASE_ADDR | 0x400) ++#define NRF52_NVMC_CONFIG_ADDR (NRF52_NVMC_BASE_ADDR | 0x504) ++#define NRF52_NVMC_ERASEPAGE_ADDR (NRF52_NVMC_BASE_ADDR | 0x508) ++#define NRF52_NVMC_ERASEALL_ADDR (NRF52_NVMC_BASE_ADDR | 0x50C) ++#define NRF52_NVMC_ERASEUICR_ADDR (NRF52_NVMC_BASE_ADDR | 0x514) ++ ++/* nRF52 bit fields. */ ++enum nrf52_nvmc_config_bits { ++ NRF52_NVMC_CONFIG_REN = 0x0, ++ NRF52_NVMC_CONFIG_WEN = 0x01, ++ NRF52_NVMC_CONFIG_EEN = 0x02 ++}; ++ ++enum nrf52_nvmc_ready_bits { ++ NRF52_NVMC_BUSY = 0x0, ++ NRF52_NVMC_READY = 0x01 ++}; ++ ++/* nRF52 state information. */ ++struct nrf52_info { ++ uint32_t code_page_size; /* Size of FLASH page in bytes. */ ++ uint32_t code_memory_size; /* Size of Code FLASH region in bytes. */ ++ ++ struct { ++ bool probed; ++ int (*write) (struct flash_bank *bank, ++ struct nrf52_info *chip, ++ const uint8_t *buffer, uint32_t offset, uint32_t count); ++ } bank[2]; /* There are two regions in nRF52 FLASH - Code and UICR. */ ++ struct target *target; ++}; ++ ++static int nrf52_protect_check(struct flash_bank *bank); ++ ++static int nrf52_probe(struct flash_bank *bank) ++{ ++ int res; ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ res = target_read_u32(chip->target, ++ NRF52_FICR_CODEPAGESIZE_ADDR, ++ &chip->code_page_size); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read code page size"); ++ return res; ++ } ++ ++ res = target_read_u32(chip->target, ++ NRF52_FICR_CODESIZE_ADDR, ++ &chip->code_memory_size); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read code memory size"); ++ return res; ++ } ++ ++ chip->code_memory_size = chip->code_memory_size * chip->code_page_size; ++ ++ if (bank->base == NRF52_FLASH_BASE_ADDR) { ++ bank->size = chip->code_memory_size; ++ bank->num_sectors = bank->size / chip->code_page_size; ++ bank->sectors = calloc(bank->num_sectors, ++ sizeof((bank->sectors)[0])); ++ if (!bank->sectors) ++ return ERROR_FLASH_BANK_NOT_PROBED; ++ ++ /* Fill out the sector information: All nRF51 sectors are the same size. */ ++ for (int i = 0; i < bank->num_sectors; i++) { ++ bank->sectors[i].size = chip->code_page_size; ++ bank->sectors[i].offset = i * chip->code_page_size; ++ ++ /* Mark as unknown. */ ++ bank->sectors[i].is_erased = -1; ++ bank->sectors[i].is_protected = -1; ++ } ++ ++ nrf52_protect_check(bank); ++ ++ chip->bank[0].probed = true; ++ } else { /* This is the UICR bank. */ ++ bank->size = chip->code_page_size; ++ bank->num_sectors = 1; ++ bank->sectors = calloc(bank->num_sectors, ++ sizeof((bank->sectors)[0])); ++ if (!bank->sectors) ++ return ERROR_FLASH_BANK_NOT_PROBED; ++ ++ bank->sectors[0].size = bank->size; ++ bank->sectors[0].offset = 0; ++ ++ bank->sectors[0].is_erased = -1; ++ bank->sectors[0].is_protected = -1; ++ ++ chip->bank[1].probed = true; ++ } ++ ++ return ERROR_OK; ++} ++ ++static int nrf52_bank_is_probed(struct flash_bank *bank) ++{ ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ return chip->bank[bank->bank_number].probed; ++} ++ ++static int nrf52_auto_probe(struct flash_bank *bank) ++{ ++ if (!nrf52_bank_is_probed(bank)) ++ return nrf52_probe(bank); ++ else ++ return ERROR_OK; ++} ++ ++static int nrf52_wait_for_nvmc(struct nrf52_info *chip) ++{ ++ int res; ++ uint32_t ready; ++ int timeout = 100; ++ ++ do { ++ res = target_read_u32(chip->target, NRF52_NVMC_READY_ADDR, &ready); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read NVMC_READY register"); ++ return res; ++ } ++ ++ if (ready == NRF52_NVMC_READY) ++ return ERROR_OK; ++ ++ alive_sleep(1); ++ } while (timeout--); ++ ++ LOG_DEBUG("Timed out waiting for the NVMC to be ready"); ++ return ERROR_FLASH_BUSY; ++} ++ ++static int nrf52_nvmc_erase_enable(struct nrf52_info *chip) ++{ ++ int res; ++ ++ res = nrf52_wait_for_nvmc(chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ res = target_write_u32(chip->target, ++ NRF52_NVMC_CONFIG_ADDR, ++ NRF52_NVMC_CONFIG_EEN); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to configure the NVMC for erasing"); ++ return res; ++ } ++ ++ return res; ++} ++ ++static int nrf52_nvmc_write_enable(struct nrf52_info *chip) ++{ ++ int res; ++ ++ res = nrf52_wait_for_nvmc(chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ res = target_write_u32(chip->target, ++ NRF52_NVMC_CONFIG_ADDR, ++ NRF52_NVMC_CONFIG_WEN); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to configure the NVMC for writing"); ++ return res; ++ } ++ ++ return res; ++} ++ ++static int nrf52_nvmc_read_only(struct nrf52_info *chip) ++{ ++ int res; ++ ++ res = nrf52_wait_for_nvmc(chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ res = target_write_u32(chip->target, ++ NRF52_NVMC_CONFIG_ADDR, ++ NRF52_NVMC_CONFIG_REN); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to configure the NVMC for read-only"); ++ return res; ++ } ++ ++ return res; ++} ++ ++static int nrf52_nvmc_generic_erase(struct nrf52_info *chip, ++ uint32_t erase_register, ++ uint32_t erase_value) ++{ ++ int res; ++ ++ res = nrf52_nvmc_erase_enable(chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ res = target_write_u32(chip->target, ++ erase_register, ++ erase_value); ++ if (res != ERROR_OK) ++ LOG_ERROR("Failed to write NVMC erase register"); ++ ++ return nrf52_nvmc_read_only(chip); ++} ++ ++static int nrf52_protect_check(struct flash_bank *bank) ++{ ++ LOG_WARNING("nrf52_protect_check() is not implemented for nRF52 series devices yet"); ++ return ERROR_OK; ++} ++ ++static int nrf52_protect(struct flash_bank *bank, int set, int first, int last) ++{ ++ LOG_WARNING("nrf52_protect() is not implemented for nRF52 series devices yet"); ++ return ERROR_OK; ++} ++ ++static struct flash_sector *nrf52_find_sector_by_address(struct flash_bank *bank, uint32_t address) ++{ ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ for (int i = 0; i < bank->num_sectors; i++) ++ if (bank->sectors[i].offset <= address && ++ address < (bank->sectors[i].offset + chip->code_page_size)) { ++ return &bank->sectors[i]; ++ } ++ ++ return NULL; ++} ++ ++static int nrf52_erase_all(struct nrf52_info *chip) ++{ ++ LOG_DEBUG("Erasing all non-volatile memory"); ++ return nrf52_nvmc_generic_erase(chip, ++ NRF52_NVMC_ERASEALL_ADDR, ++ 0x01); ++} ++ ++static int nrf52_erase_page(struct flash_bank *bank, ++ struct nrf52_info *chip, ++ struct flash_sector *sector) ++{ ++ int res; ++ ++ LOG_DEBUG("Erasing page at 0x%"PRIx32, sector->offset); ++ if (sector->is_protected == 1) { ++ LOG_ERROR("Cannot erase protected sector at 0x%" PRIx32, sector->offset); ++ return ERROR_FAIL; ++ } ++ ++ if (bank->base == NRF52_UICR_BASE_ADDR) { ++ res = nrf52_nvmc_generic_erase(chip, ++ NRF52_NVMC_ERASEUICR_ADDR, ++ 0x00000001); ++ } else { ++ res = nrf52_nvmc_generic_erase(chip, ++ NRF52_NVMC_ERASEPAGE_ADDR, ++ sector->offset); ++ } ++ ++ if (res == ERROR_OK) ++ sector->is_erased = 1; ++ return res; ++} ++ ++static const uint8_t nrf52_flash_write_code[] = { ++ /* See contrib/loaders/flash/cortex-m0.S */ ++ /* <wait_fifo>: */ ++ 0x0d, 0x68, /* ldr r5, [r1, #0] */ ++ 0x00, 0x2d, /* cmp r5, #0 */ ++ 0x0b, 0xd0, /* beq.n 1e <exit> */ ++ 0x4c, 0x68, /* ldr r4, [r1, #4] */ ++ 0xac, 0x42, /* cmp r4, r5 */ ++ 0xf9, 0xd0, /* beq.n 0 <wait_fifo> */ ++ 0x20, 0xcc, /* ldmia r4!, {r5} */ ++ 0x20, 0xc3, /* stmia r3!, {r5} */ ++ 0x94, 0x42, /* cmp r4, r2 */ ++ 0x01, 0xd3, /* bcc.n 18 <no_wrap> */ ++ 0x0c, 0x46, /* mov r4, r1 */ ++ 0x08, 0x34, /* adds r4, #8 */ ++ /* <no_wrap>: */ ++ 0x4c, 0x60, /* str r4, [r1, #4] */ ++ 0x04, 0x38, /* subs r0, #4 */ ++ 0xf0, 0xd1, /* bne.n 0 <wait_fifo> */ ++ /* <exit>: */ ++ 0x00, 0xbe /* bkpt 0x0000 */ ++}; ++ ++ ++/* Start a low level flash write for the specified region */ ++static int nrf52_ll_flash_write(struct nrf52_info *chip, uint32_t offset, const uint8_t *buffer, uint32_t bytes) ++{ ++ struct target *target = chip->target; ++ uint32_t buffer_size = 8192; ++ struct working_area *write_algorithm; ++ struct working_area *source; ++ uint32_t address = NRF52_FLASH_BASE_ADDR + offset; ++ struct reg_param reg_params[4]; ++ struct armv7m_algorithm armv7m_info; ++ int retval = ERROR_OK; ++ ++ LOG_DEBUG("Writing buffer to flash offset=0x%"PRIx32" bytes=0x%"PRIx32, offset, bytes); ++ assert(bytes % 4 == 0); ++ ++ /* allocate working area with flash programming code */ ++ if (target_alloc_working_area(target, sizeof(nrf52_flash_write_code), ++ &write_algorithm) != ERROR_OK) { ++ LOG_WARNING("no working area available, falling back to slow memory writes"); ++ ++ for (; bytes > 0; bytes -= 4) { ++ retval = target_write_memory(chip->target, ++ offset, 4, 1, buffer); ++ if (retval != ERROR_OK) ++ return retval; ++ ++ retval = nrf52_wait_for_nvmc(chip); ++ if (retval != ERROR_OK) ++ return retval; ++ ++ offset += 4; ++ buffer += 4; ++ } ++ ++ return ERROR_OK; ++ } ++ ++ LOG_WARNING("using fast async flash loader. This is currently supported"); ++ LOG_WARNING("only with ST-Link and CMSIS-DAP. If you have issues, add"); ++ LOG_WARNING("\"set WORKAREASIZE 0\" before sourcing nrf52.cfg to disable it"); ++ ++ retval = target_write_buffer(target, write_algorithm->address, ++ sizeof(nrf52_flash_write_code), ++ nrf52_flash_write_code); ++ if (retval != ERROR_OK) ++ return retval; ++ ++ /* memory buffer */ ++ while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) { ++ buffer_size /= 2; ++ buffer_size &= ~3UL; /* Make sure it's 4 byte aligned */ ++ if (buffer_size <= 256) { ++ /* free working area, write algorithm already allocated */ ++ target_free_working_area(target, write_algorithm); ++ ++ LOG_WARNING("No large enough working area available, can't do block memory writes"); ++ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; ++ } ++ } ++ ++ armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; ++ armv7m_info.core_mode = ARM_MODE_THREAD; ++ ++ init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* byte count */ ++ init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer start */ ++ init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* buffer end */ ++ init_reg_param(®_params[3], "r3", 32, PARAM_IN_OUT); /* target address */ ++ ++ buf_set_u32(reg_params[0].value, 0, 32, bytes); ++ buf_set_u32(reg_params[1].value, 0, 32, source->address); ++ buf_set_u32(reg_params[2].value, 0, 32, source->address + source->size); ++ buf_set_u32(reg_params[3].value, 0, 32, address); ++ ++ retval = target_run_flash_async_algorithm(target, buffer, bytes/4, 4, ++ 0, NULL, ++ 4, reg_params, ++ source->address, source->size, ++ write_algorithm->address, 0, ++ &armv7m_info); ++ ++ target_free_working_area(target, source); ++ target_free_working_area(target, write_algorithm); ++ ++ destroy_reg_param(®_params[0]); ++ destroy_reg_param(®_params[1]); ++ destroy_reg_param(®_params[2]); ++ destroy_reg_param(®_params[3]); ++ ++ return retval; ++} ++ ++/* Check and erase flash sectors in specified range, then start a low level page write. ++ start/end must be sector aligned. ++*/ ++static int nrf52_write_pages(struct flash_bank *bank, uint32_t start, uint32_t end, const uint8_t *buffer) ++{ ++ int res; ++ uint32_t offset; ++ struct flash_sector *sector; ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ assert(start % chip->code_page_size == 0); ++ assert(end % chip->code_page_size == 0); ++ ++ /* Erase all sectors */ ++ for (offset = start; offset < end; offset += chip->code_page_size) { ++ sector = nrf52_find_sector_by_address(bank, offset); ++ ++ if (sector == NULL) { ++ LOG_ERROR("Invalid sector @ 0x%08"PRIx32, offset); ++ return ERROR_FLASH_SECTOR_INVALID; ++ } ++ ++ if (sector->is_protected == 1) { ++ LOG_ERROR("Can't erase protected sector @ 0x%08"PRIx32, offset); ++ return ERROR_FAIL; ++ } ++ ++ if (sector->is_erased != 1) { /* 1 = erased, 0= not erased, -1 = unknown */ ++ res = nrf52_erase_page(bank, chip, sector); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to erase sector @ 0x%08"PRIx32, sector->offset); ++ return res; ++ } ++ } ++ sector->is_erased = 1; ++ } ++ ++ res = nrf52_nvmc_write_enable(chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ res = nrf52_ll_flash_write(chip, start, buffer, (end - start)); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to write FLASH"); ++ nrf52_nvmc_read_only(chip); ++ return res; ++ } ++ ++ return nrf52_nvmc_read_only(chip); ++} ++ ++static int nrf52_erase(struct flash_bank *bank, int first, int last) ++{ ++ int res = ERROR_OK; ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ /* For each sector to be erased */ ++ for (int s = first; s <= last && res == ERROR_OK; s++) ++ res = nrf52_erase_page(bank, chip, &bank->sectors[s]); ++ ++ return res; ++} ++ ++static int nrf52_code_flash_write(struct flash_bank *bank, ++ struct nrf52_info *chip, ++ const uint8_t *buffer, uint32_t offset, uint32_t count) ++{ ++ int res; ++ /* Need to perform reads to fill any gaps we need to preserve in the first page, ++ before the start of buffer, or in the last page, after the end of buffer */ ++ uint32_t first_page = offset / chip->code_page_size; ++ uint32_t last_page = DIV_ROUND_UP(offset+count, chip->code_page_size); ++ ++ uint32_t first_page_offset = first_page * chip->code_page_size; ++ uint32_t last_page_offset = last_page * chip->code_page_size; ++ ++ LOG_DEBUG("Padding write from 0x%08"PRIx32"-0x%08"PRIx32" as 0x%08"PRIx32"-0x%08"PRIx32, ++ offset, offset+count, first_page_offset, last_page_offset); ++ ++ uint32_t page_cnt = last_page - first_page; ++ uint8_t buffer_to_flash[page_cnt * chip->code_page_size]; ++ ++ /* Fill in any space between start of first page and start of buffer */ ++ uint32_t pre = offset - first_page_offset; ++ if (pre > 0) { ++ res = target_read_memory(bank->target, first_page_offset, 1, pre, buffer_to_flash); ++ if (res != ERROR_OK) ++ return res; ++ } ++ ++ /* Fill in main contents of buffer */ ++ memcpy(buffer_to_flash + pre, buffer, count); ++ ++ /* Fill in any space between end of buffer and end of last page */ ++ uint32_t post = last_page_offset - (offset + count); ++ if (post > 0) { ++ /* Retrieve the full row contents from Flash */ ++ res = target_read_memory(bank->target, offset + count, 1, post, buffer_to_flash + pre + count); ++ if (res != ERROR_OK) ++ return res; ++ } ++ ++ return nrf52_write_pages(bank, first_page_offset, last_page_offset, buffer_to_flash); ++} ++ ++static int nrf52_uicr_flash_write(struct flash_bank *bank, ++ struct nrf52_info *chip, ++ const uint8_t *buffer, uint32_t offset, uint32_t count) ++{ ++ int res; ++ uint32_t nrf52_uicr_size = chip->code_page_size; ++ uint8_t uicr[nrf52_uicr_size]; ++ struct flash_sector *sector = &bank->sectors[0]; ++ ++ if ((offset + count) > nrf52_uicr_size) ++ return ERROR_FAIL; ++ ++ res = target_read_memory(bank->target, NRF52_UICR_BASE_ADDR, 1, nrf52_uicr_size, uicr); ++ ++ if (res != ERROR_OK) ++ return res; ++ ++ if (sector->is_erased != 1) { ++ res = nrf52_erase_page(bank, chip, sector); ++ if (res != ERROR_OK) ++ return res; ++ } ++ ++ memcpy(&uicr[offset], buffer, count); ++ ++ res = nrf52_nvmc_write_enable(chip); ++ if (res != ERROR_OK) ++ return res; ++ ++ res = nrf52_ll_flash_write(chip, NRF52_UICR_BASE_ADDR, uicr, nrf52_uicr_size); ++ if (res != ERROR_OK) { ++ nrf52_nvmc_read_only(chip); ++ return res; ++ } ++ ++ return nrf52_nvmc_read_only(chip); ++} ++ ++ ++static int nrf52_write(struct flash_bank *bank, const uint8_t *buffer, ++ uint32_t offset, uint32_t count) ++{ ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ return chip->bank[bank->bank_number].write(bank, chip, buffer, offset, count); ++} ++ ++ ++FLASH_BANK_COMMAND_HANDLER(nrf52_flash_bank_command) ++{ ++ static struct nrf52_info *chip; ++ ++ assert(bank != NULL); ++ ++ switch (bank->base) { ++ case NRF52_FLASH_BASE_ADDR: ++ bank->bank_number = 0; ++ break; ++ case NRF52_UICR_BASE_ADDR: ++ bank->bank_number = 1; ++ break; ++ default: ++ LOG_ERROR("Invalid bank address 0x%08" PRIx32, bank->base); ++ return ERROR_FAIL; ++ } ++ ++ if (!chip) { ++ /* Create a new chip */ ++ chip = calloc(1, sizeof(*chip)); ++ assert(chip != NULL); ++ ++ chip->target = bank->target; ++ } ++ ++ switch (bank->base) { ++ case NRF52_FLASH_BASE_ADDR: ++ chip->bank[bank->bank_number].write = nrf52_code_flash_write; ++ break; ++ case NRF52_UICR_BASE_ADDR: ++ chip->bank[bank->bank_number].write = nrf52_uicr_flash_write; ++ break; ++ } ++ ++ chip->bank[bank->bank_number].probed = false; ++ bank->driver_priv = chip; ++ ++ return ERROR_OK; ++} ++ ++COMMAND_HANDLER(nrf52_handle_mass_erase_command) ++{ ++ int res; ++ struct flash_bank *bank = NULL; ++ struct target *target = get_current_target(CMD_CTX); ++ ++ res = get_flash_bank_by_addr(target, NRF52_FLASH_BASE_ADDR, true, &bank); ++ if (res != ERROR_OK) ++ return res; ++ ++ assert(bank != NULL); ++ ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ res = nrf52_erase_all(chip); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to erase the chip"); ++ nrf52_protect_check(bank); ++ return res; ++ } ++ ++ for (int i = 0; i < bank->num_sectors; i++) ++ bank->sectors[i].is_erased = 1; ++ ++ res = nrf52_protect_check(bank); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Failed to check chip's write protection"); ++ return res; ++ } ++ ++ res = get_flash_bank_by_addr(target, NRF52_UICR_BASE_ADDR, true, &bank); ++ if (res != ERROR_OK) ++ return res; ++ ++ bank->sectors[0].is_erased = 1; ++ ++ return ERROR_OK; ++} ++ ++static int nrf52_info(struct flash_bank *bank, char *buf, int buf_size) ++{ ++ int res; ++ uint32_t ficr[2]; ++ struct nrf52_info *chip = bank->driver_priv; ++ assert(chip != NULL); ++ ++ res = target_read_u32(chip->target, NRF52_FICR_CODEPAGESIZE_ADDR, &ficr[0]); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read NVMC_READY register"); ++ return res; ++ } ++ ++ res = target_read_u32(chip->target, NRF52_FICR_CODESIZE_ADDR, &ficr[1]); ++ if (res != ERROR_OK) { ++ LOG_ERROR("Couldn't read NVMC_READY register"); ++ return res; ++ } ++ ++ snprintf(buf, buf_size, ++ "\n--------nRF52 Series Device--------\n\n" ++ "\n[factory information control block]\n" ++ "code page size: %"PRIu32"B\n" ++ "code memory size: %"PRIu32"kB\n", ++ ficr[0], ++ (ficr[1] * ficr[0]) / 1024); ++ ++ return ERROR_OK; ++} ++ ++static const struct command_registration nrf52_exec_command_handlers[] = { ++ { ++ .name = "mass_erase", ++ .handler = nrf52_handle_mass_erase_command, ++ .mode = COMMAND_EXEC, ++ .help = "Erase all flash contents of the chip.", ++ }, ++ COMMAND_REGISTRATION_DONE ++}; ++ ++static const struct command_registration nrf52_command_handlers[] = { ++ { ++ .name = "nrf52", ++ .mode = COMMAND_ANY, ++ .help = "nrf52 flash command group", ++ .usage = "", ++ .chain = nrf52_exec_command_handlers, ++ }, ++ COMMAND_REGISTRATION_DONE ++}; ++ ++struct flash_driver nrf52_flash = { ++ .name = "nrf52", ++ .commands = nrf52_command_handlers, ++ .flash_bank_command = nrf52_flash_bank_command, ++ .info = nrf52_info, ++ .erase = nrf52_erase, ++ .protect = nrf52_protect, ++ .write = nrf52_write, ++ .read = default_flash_read, ++ .probe = nrf52_probe, ++ .auto_probe = nrf52_auto_probe, ++ .erase_check = default_flash_blank_check, ++ .protect_check = nrf52_protect_check, ++}; +diff --git a/tcl/target/nrf52.cfg b/tcl/target/nrf52.cfg +index c1cbf1a..a2567ff 100644 +--- a/tcl/target/nrf52.cfg ++++ b/tcl/target/nrf52.cfg +@@ -5,15 +5,22 @@ + source [find target/swj-dp.tcl] + + if { [info exists CHIPNAME] } { +- set _CHIPNAME $CHIPNAME ++ set _CHIPNAME $CHIPNAME + } else { +- set _CHIPNAME nrf52 ++ set _CHIPNAME nrf52 ++} ++ ++# Work-area is a space in RAM used for flash programming, by default use 16kB. ++if { [info exists WORKAREASIZE] } { ++ set _WORKAREASIZE $WORKAREASIZE ++} else { ++ set _WORKAREASIZE 0x4000 + } + + if { [info exists CPUTAPID] } { +- set _CPUTAPID $CPUTAPID ++ set _CPUTAPID $CPUTAPID + } else { +- set _CPUTAPID 0x2ba01477 ++ set _CPUTAPID 0x2ba01477 + } + + swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID +@@ -21,8 +28,15 @@ swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID + set _TARGETNAME $_CHIPNAME.cpu + target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME + +-adapter_khz 10000 ++$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +-if { ![using_hla] } { +- cortex_m reset_config sysresetreq ++if {![using_hla]} { ++ cortex_m reset_config sysresetreq + } ++ ++flash bank $_CHIPNAME.flash nrf52 0x00000000 0 1 1 $_TARGETNAME ++flash bank $_CHIPNAME.uicr nrf52 0x10001000 0 1 1 $_TARGETNAME ++ ++adapter_khz 1000 ++ ++$_TARGETNAME configure -event reset-end {} -- 2.10.1 ^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [PATCH v3 3/3] gnu: Add openocd. 2016-10-28 17:36 ` [PATCH v3 3/3] gnu: Add openocd Theodoros Foradis @ 2016-10-30 1:40 ` David Craven 2016-10-30 5:34 ` Ricardo Wurmus 2017-02-13 19:44 ` Leo Famulari 1 sibling, 1 reply; 29+ messages in thread From: David Craven @ 2016-10-30 1:40 UTC (permalink / raw) To: Theodoros Foradis; +Cc: guix-devel Hi Theodor, I made libjaylink and jimtcl two separate packages and a couple of style changes. Pushed as 5b83b7b854054900abe7fef699d81943892e6e7a, 3d74f12e63f7f94e2609b7bb028c3153df05c9bb and 94f36a4f5e101dc7d4f65224b1d3f0abebe643af. Thank you! David ^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v3 3/3] gnu: Add openocd. 2016-10-30 1:40 ` David Craven @ 2016-10-30 5:34 ` Ricardo Wurmus 2016-10-30 13:05 ` David Craven 2016-10-30 18:24 ` Ricardo Wurmus 0 siblings, 2 replies; 29+ messages in thread From: Ricardo Wurmus @ 2016-10-30 5:34 UTC (permalink / raw) To: David Craven; +Cc: guix-devel David Craven <david@craven.ch> writes: > Hi Theodor, > > I made libjaylink and jimtcl two separate packages and a couple of > style changes. In that case we can use the tarball release of openocd, no? This would simplify the package as we would no longer need to bootstrap. Could you please take care of this? ~~ Ricardo ^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v3 3/3] gnu: Add openocd. 2016-10-30 5:34 ` Ricardo Wurmus @ 2016-10-30 13:05 ` David Craven 2016-10-30 18:18 ` Ricardo Wurmus 2016-10-30 18:24 ` Ricardo Wurmus 1 sibling, 1 reply; 29+ messages in thread From: David Craven @ 2016-10-30 13:05 UTC (permalink / raw) To: Ricardo Wurmus; +Cc: guix-devel > This would simplify the package as we would no longer need to > bootstrap. Could you please take care of this? Probably. I don't know, I didn't try. ^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v3 3/3] gnu: Add openocd. 2016-10-30 13:05 ` David Craven @ 2016-10-30 18:18 ` Ricardo Wurmus 2016-10-30 18:19 ` David Craven 0 siblings, 1 reply; 29+ messages in thread From: Ricardo Wurmus @ 2016-10-30 18:18 UTC (permalink / raw) To: David Craven; +Cc: guix-devel David Craven <david@craven.ch> writes: >> This would simplify the package as we would no longer need to >> bootstrap. Could you please take care of this? > > Probably. I don't know, I didn't try. Okay, I’ll do it. I also noticed that the license is actually gpl2+. I’ll change this along with the source. ~~ Ricardo ^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v3 3/3] gnu: Add openocd. 2016-10-30 18:18 ` Ricardo Wurmus @ 2016-10-30 18:19 ` David Craven 0 siblings, 0 replies; 29+ messages in thread From: David Craven @ 2016-10-30 18:19 UTC (permalink / raw) To: Ricardo Wurmus; +Cc: guix-devel Sorry, I set today aside for a dumb ass paper I have to write, not that I have gotten very far with it... ^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v3 3/3] gnu: Add openocd. 2016-10-30 5:34 ` Ricardo Wurmus 2016-10-30 13:05 ` David Craven @ 2016-10-30 18:24 ` Ricardo Wurmus 1 sibling, 0 replies; 29+ messages in thread From: Ricardo Wurmus @ 2016-10-30 18:24 UTC (permalink / raw) To: David Craven; +Cc: guix-devel Ricardo Wurmus <rekado@elephly.net> writes: > David Craven <david@craven.ch> writes: > >> Hi Theodor, >> >> I made libjaylink and jimtcl two separate packages and a couple of >> style changes. > > In that case we can use the tarball release of openocd, no? > > This would simplify the package as we would no longer need to > bootstrap. Could you please take care of this? It looks like using the latest release won’t work because the patch applies to master :-/ So I won’t be updating the source and fix just the license. ~~ Ricardo ^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v3 3/3] gnu: Add openocd. 2016-10-28 17:36 ` [PATCH v3 3/3] gnu: Add openocd Theodoros Foradis 2016-10-30 1:40 ` David Craven @ 2017-02-13 19:44 ` Leo Famulari 1 sibling, 0 replies; 29+ messages in thread From: Leo Famulari @ 2017-02-13 19:44 UTC (permalink / raw) To: Theodoros Foradis; +Cc: guix-devel On Fri, Oct 28, 2016 at 08:36:06PM +0300, Theodoros Foradis wrote: > * gnu/packages/embedded.scm (openocd): New variable. > * gnu/packages/patches/openocd-nrf52.patch: New file. > * gnu/local.mk (dist_patch_DATA): Add the patch. FYI, there is a new release of OpenOCD. Would anyone like to try updating it? http://openocd.org/2017/01/openocd-0-10-0-release-is-out/ ^ permalink raw reply [flat|nested] 29+ messages in thread
end of thread, other threads:[~2017-02-13 19:44 UTC | newest] Thread overview: 29+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2016-10-25 13:26 [PATCH 0/3] gnu: Add gdb-arm-none-eabi and openocd Theodoros Foradis 2016-10-25 13:26 ` [PATCH 1/3] gnu: Add gdb-arm-none-eabi Theodoros Foradis 2016-10-26 12:57 ` David Craven 2016-10-25 13:26 ` [PATCH 2/3] gnu: Add hidapi Theodoros Foradis 2016-10-26 12:55 ` David Craven 2016-10-26 18:29 ` Theodoros Foradis 2016-10-26 18:50 ` David Craven 2016-10-25 13:26 ` [PATCH 3/3] gnu: Add openocd Theodoros Foradis 2016-10-26 12:49 ` David Craven 2016-10-26 21:08 ` [PATCH v2 0/3] gnu: Add gdb-arm-none-eabi and openocd Theodoros Foradis 2016-10-26 21:08 ` [PATCH v2 1/3] gnu: Add gdb-arm-none-eabi Theodoros Foradis 2016-10-26 21:08 ` [PATCH v2 2/3] gnu: Add hidapi Theodoros Foradis 2016-10-28 6:19 ` Ricardo Wurmus 2016-10-28 15:35 ` Theodoros Foradis 2016-10-26 21:08 ` [PATCH v2 3/3] gnu: Add openocd Theodoros Foradis 2016-10-27 6:24 ` Efraim Flashner 2016-10-28 6:14 ` Ricardo Wurmus 2016-10-28 17:36 ` Theodoros Foradis 2016-10-28 17:36 ` [PATCH v3 1/3] gnu: Add gdb-arm-none-eabi Theodoros Foradis 2016-10-28 17:36 ` [PATCH v3 2/3] gnu: Add hidapi Theodoros Foradis 2016-11-09 15:45 ` Ludovic Courtès 2016-10-28 17:36 ` [PATCH v3 3/3] gnu: Add openocd Theodoros Foradis 2016-10-30 1:40 ` David Craven 2016-10-30 5:34 ` Ricardo Wurmus 2016-10-30 13:05 ` David Craven 2016-10-30 18:18 ` Ricardo Wurmus 2016-10-30 18:19 ` David Craven 2016-10-30 18:24 ` Ricardo Wurmus 2017-02-13 19:44 ` Leo Famulari
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