From mboxrd@z Thu Jan 1 00:00:00 1970 From: Danny Milosavljevic Subject: [PATCH v3 3/6] gnu: Add yosys. Date: Tue, 27 Sep 2016 02:04:57 +0200 Message-ID: <20160927000500.10996-4-dannym@scratchpost.org> References: <20160927000500.10996-1-dannym@scratchpost.org> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="------------2.10.0" Return-path: Received: from eggs.gnu.org ([2001:4830:134:3::10]:45884) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1boftf-0005tk-K9 for guix-devel@gnu.org; Mon, 26 Sep 2016 20:05:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bofta-0005gB-4J for guix-devel@gnu.org; Mon, 26 Sep 2016 20:05:18 -0400 Received: from dd1012.kasserver.com ([85.13.128.8]:54906) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1boftZ-0005dL-R9 for guix-devel@gnu.org; Mon, 26 Sep 2016 20:05:14 -0400 In-Reply-To: <20160927000500.10996-1-dannym@scratchpost.org> List-Id: "Development of GNU Guix and the GNU System distribution." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: guix-devel-bounces+gcggd-guix-devel=m.gmane.org@gnu.org Sender: "Guix-devel" To: guix-devel@gnu.org This is a multi-part message in MIME format. --------------2.10.0 Content-Type: text/plain; charset=UTF-8; format=fixed Content-Transfer-Encoding: quoted-printable * gnu/packages/fpga.scm (yosys): New variable. --- gnu/packages/fpga.scm | 81 +++++++++++++++++++++++++++++++++++++++++++++= ++++++ 1 file changed, 81 insertions(+) --------------2.10.0 Content-Type: text/x-patch; name="0003-gnu-Add-yosys.patch" Content-Disposition: attachment; filename="0003-gnu-Add-yosys.patch" Content-Transfer-Encoding: quoted-printable diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm index 1d1c981..763d746 100644 --- a/gnu/packages/fpga.scm +++ b/gnu/packages/fpga.scm @@ -108,3 +108,84 @@ For synthesis, the compiler generates netlists in th= e desired format.") ;; Otherwise would be GPL2+. ;; You have to accept both GPL2 and LGPL2.1+. (license (list license:gpl2 license:lgpl2.1+)))) + +(define-public yosys + (package + (name "yosys") + (version "0.6") + (source (origin + (method url-fetch) + (uri + (string-append "https://github.com/cliffordwolf/yosys/arc= hive/" + name "-" version ".tar.gz")) + (sha256 + (base32 + "02j0c0m9dfyjccynalf0aggj6gy20k7iphpkg5cn6sdirlkv8gmx= ")) + (file-name (string-append name "-" version "-checkout.tar.= gz")) + (modules '((guix build utils))) + (snippet + '(substitute* "Makefile" + (("ABCREV =3D .*") "ABCREV =3D default\n"))))) + (build-system gnu-build-system) + (arguments + `(#:test-target "test" + #:make-flags (list "CC=3Dgcc" + "CXX=3Dg++" + (string-append "PREFIX=3D" %output)) + #:phases + (modify-phases %standard-phases + (replace 'configure + (lambda* (#:key inputs (make-flags '()) #:allow-other-keys) + (zero? (apply system* "make" "config-gcc" make-flags)))) + (add-after 'configure 'prepare-abc + (lambda* (#:key inputs #:allow-other-keys) + (let* ((sourceabc (assoc-ref inputs "abc")) + (sourcebin (string-append sourceabc "/bin")) + (source (string-append sourcebin "/abc"))) + (mkdir-p "abc") + (call-with-output-file "abc/Makefile" + (lambda (port) + (format port ".PHONY: all\nall:\n\tcp -f abc abc-= default\n"))) + (copy-file source "abc/abc") + (zero? (system* "chmod" "+w" "abc/abc"))))) + (add-before 'check 'fix-iverilog-references + (lambda* (#:key inputs native-inputs #:allow-other-keys) + (let* ((xinputs (or native-inputs inputs)) + (xdirname (assoc-ref xinputs "iverilog")) + (iverilog (string-append xdirname "/bin/iverilog")= )) + (substitute* '("./manual/CHAPTER_StateOfTheArt/synt= h.sh" + "./manual/CHAPTER_StateOfTheArt/vali= date_tb.sh" + "./techlibs/ice40/tests/test_bram.sh= " + "./techlibs/ice40/tests/test_ffs.sh" + "./techlibs/xilinx/tests/bram1.sh" + "./techlibs/xilinx/tests/bram2.sh" + "./tests/bram/run-single.sh" + "./tests/realmath/run-test.sh" + "./tests/simple/run-test.sh" + "./tests/techmap/mem_simple_4x1_runt= est.sh" + "./tests/tools/autotest.sh" + "./tests/vloghtb/common.sh") + (("if ! which iverilog") "if ! true") + (("iverilog ") (string-append iverilog " ")) + (("iverilog_bin=3D\".*\"") (string-append "iveri= log_bin=3D\"" + iverilog + "\""))))= ))))) + ;; TODO add xdot [patch the path to it here] as soon as I find out w= here it is. + (native-inputs + `(("pkg-config" ,pkg-config) + ("python" ,python) + ("bison" ,bison) + ("flex" ,flex) + ("gawk" , gawk) ; for the tests and "make" progress pretty-printi= ng + ("tcl" ,tcl) ; tclsh for the tests + ("iverilog" ,iverilog) ; for the tests + )) + (inputs + `(("tcl" ,tcl) + ("readline" ,readline) + ("libffi" ,libffi) + ("abc" ,abc))) + (home-page "http://www.clifford.at/yosys/") + (synopsis "FPGA Verilog RTL synthesizer") + (description "Yosys synthesizes Verilog-2005.") + (license license:isc))) --------------2.10.0--