* Fwd: [Libre-soc-dev] CLEAR, Open Source FPGA
[not found] <8A6E6EB6-C095-407B-A41D-3CA20FA33240@gmail.com>
@ 2022-03-27 18:55 ` Tobias Platen
2022-03-28 20:01 ` jbranso
1 sibling, 0 replies; 2+ messages in thread
From: Tobias Platen @ 2022-03-27 18:55 UTC (permalink / raw)
To: guix-devel
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If they succeed the free toolchain can be packaged in guix.
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From: lkcl <luke.leighton@gmail.com>
To: libre-soc-dev <libre-soc-dev@lists.libre-soc.org>
Subject: [Libre-soc-dev] CLEAR, Open Source FPGA
Date: Fri, 25 Mar 2022 19:10:35 +0000
Message-ID: <8A6E6EB6-C095-407B-A41D-3CA20FA33240@gmail.com>
https://groupgets.com/campaigns/1003-clear-the-open-source-fpga-asic-by-chipignite
please do share that widely, there are a few days to go before they reach 200. both the HDL and the toolchain are Libre, they deserve to succeed.
l.
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^ permalink raw reply [flat|nested] 2+ messages in thread* Re: Fwd: [Libre-soc-dev] CLEAR, Open Source FPGA
[not found] <8A6E6EB6-C095-407B-A41D-3CA20FA33240@gmail.com>
2022-03-27 18:55 ` Fwd: [Libre-soc-dev] CLEAR, Open Source FPGA Tobias Platen
@ 2022-03-28 20:01 ` jbranso
1 sibling, 0 replies; 2+ messages in thread
From: jbranso @ 2022-03-28 20:01 UTC (permalink / raw)
To: Tobias Platen, guix-devel
March 28, 2022 1:02 PM, "Tobias Platen" <libre-soc@platen-software.de> wrote:
> If they succeed the free toolchain can be packaged in guix.
I am not so well versed in hardware...Why is this exciting?
It only has 3kb of RAM. This could power an mp3 player? maybe?
^ permalink raw reply [flat|nested] 2+ messages in thread
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[not found] <8A6E6EB6-C095-407B-A41D-3CA20FA33240@gmail.com>
2022-03-27 18:55 ` Fwd: [Libre-soc-dev] CLEAR, Open Source FPGA Tobias Platen
2022-03-28 20:01 ` jbranso
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