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[92.40.178.1]) by smtp.gmail.com with ESMTPSA id y14-20020a056402440e00b00416046b623csm3453826eda.2.2022.03.25.12.10.34 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 25 Mar 2022 12:10:34 -0700 (PDT) Date: Fri, 25 Mar 2022 19:10:35 +0000 MIME-Version: 1.0 To: libre-soc-dev From: lkcl Message-ID: <8A6E6EB6-C095-407B-A41D-3CA20FA33240@gmail.com> Subject: [Libre-soc-dev] CLEAR, Open Source FPGA X-BeenThere: libre-soc-dev@lists.libre-soc.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Libre-Soc General Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Libre-Soc General Development Content-Type: text/plain; charset="utf-8" Errors-To: libre-soc-dev-bounces@lists.libre-soc.org Sender: "Libre-soc-dev" Content-Transfer-Encoding: 7bit https://groupgets.com/campaigns/1003-clear-the-open-source-fpga-asic-by-chipignite please do share that widely, there are a few days to go before they reach 200. both the HDL and the toolchain are Libre, they deserve to succeed. l. _______________________________________________ Libre-soc-dev mailing list Libre-soc-dev@lists.libre-soc.org http://lists.libre-soc.org/mailman/listinfo/libre-soc-dev --=-YNrdeCxJ4anjKnkWtGhu--