From mboxrd@z Thu Jan 1 00:00:00 1970 Path: news.gmane.org!not-for-mail From: David Kastrup Newsgroups: gmane.lisp.guile.devel Subject: Re: Register VM WIP Date: Wed, 16 May 2012 16:00:37 +0200 Organization: Organization?!? Message-ID: <87y5osp6nu.fsf@fencepost.gnu.org> References: <871umqr8q0.fsf@pobox.com> <873972zczy.fsf@gnu.org> <87bolpmgew.fsf@pobox.com> <871umkbvp3.fsf@netris.org> <87fwb0k35g.fsf@pobox.com> <87sjf09r5v.fsf@netris.org> NNTP-Posting-Host: plane.gmane.org Mime-Version: 1.0 Content-Type: text/plain X-Trace: dough.gmane.org 1337176874 22697 80.91.229.3 (16 May 2012 14:01:14 GMT) X-Complaints-To: usenet@dough.gmane.org NNTP-Posting-Date: Wed, 16 May 2012 14:01:14 +0000 (UTC) To: guile-devel@gnu.org Original-X-From: guile-devel-bounces+guile-devel=m.gmane.org@gnu.org Wed May 16 16:01:14 2012 Return-path: Envelope-to: guile-devel@m.gmane.org Original-Received: from lists.gnu.org ([208.118.235.17]) by plane.gmane.org with esmtp (Exim 4.69) (envelope-from ) id 1SUemv-0005bd-Se for guile-devel@m.gmane.org; Wed, 16 May 2012 16:01:14 +0200 Original-Received: from localhost ([::1]:46918 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SUemv-0001EV-DP for guile-devel@m.gmane.org; Wed, 16 May 2012 10:01:13 -0400 Original-Received: from eggs.gnu.org ([208.118.235.92]:53194) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SUeml-0001Dy-Bb for guile-devel@gnu.org; Wed, 16 May 2012 10:01:11 -0400 Original-Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SUemY-0002m8-EC for guile-devel@gnu.org; Wed, 16 May 2012 10:01:02 -0400 Original-Received: from plane.gmane.org ([80.91.229.3]:43258) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SUemY-0002lV-7p for guile-devel@gnu.org; Wed, 16 May 2012 10:00:50 -0400 Original-Received: from list by plane.gmane.org with local (Exim 4.69) (envelope-from ) id 1SUemV-0005BB-DE for guile-devel@gnu.org; Wed, 16 May 2012 16:00:47 +0200 Original-Received: from p508eab2a.dip.t-dialin.net ([80.142.171.42]) by main.gmane.org with esmtp (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Wed, 16 May 2012 16:00:47 +0200 Original-Received: from dak by p508eab2a.dip.t-dialin.net with local (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Wed, 16 May 2012 16:00:47 +0200 X-Injected-Via-Gmane: http://gmane.org/ Original-Lines: 26 Original-X-Complaints-To: usenet@dough.gmane.org X-Gmane-NNTP-Posting-Host: p508eab2a.dip.t-dialin.net X-Face: 2FEFf>]>q>2iw=B6, xrUubRI>pR&Ml9=ao@P@i)L:\urd*t9M~y1^:+Y]'C0~{mAl`oQuAl \!3KEIp?*w`|bL5qr,H)LFO6Q=qx~iH4DN; i"; /yuIsqbLLCh/!U#X[S~(5eZ41to5f%E@'ELIi$t^ Vc\LWP@J5p^rst0+('>Er0=^1{]M9!p?&:\z]|;&=NP3AhB!B_bi^]Pfkw User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.1.50 (gnu/linux) Cancel-Lock: sha1:SO1/SK6XYVK32DdUARadFF7ChXQ= X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 80.91.229.3 X-BeenThere: guile-devel@gnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Developers list for Guile, the GNU extensibility library" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: guile-devel-bounces+guile-devel=m.gmane.org@gnu.org Original-Sender: guile-devel-bounces+guile-devel=m.gmane.org@gnu.org Xref: news.gmane.org gmane.lisp.guile.devel:14465 Archived-At: Mark H Weaver writes: > I certainly agree that we should have a generous number of registers, > but I suspect that the sweet spot for a VM is 256, because it enables > more compact dispatching code in the VM, and yet is more than enough to > allow a decent register allocator to generate good code. > > That's my educated guess anyway. Feel free to prove me wrong :) The counterproof will usually be done by benchmarking, and will even differ between different processors sharing the same instruction set. I see two ways out: a) pick the register size individually for each function, as small as possible without spillage. Which makes the whole indistinguishable from a stack-based VM. b) don't generate the final bytecode until the code is actually being run. That means that _if_ code is precompiled, it will be precompiled into either stack-based VM or some other representation better suited to compile into code for a certain amount of registers. Of course, the threshold to picking actual registers of the available processor and compiling native code is then not all too large. -- David Kastrup