From schwab@linux-m68k.org Mon May 12 18:37:51 2014 From: Andreas Schwab Message-ID: <87y4y7uf4y.fsf@igel.home> To: Thorsten Glaser Cc: Manoj Srivastava , debian-68k@lists.debian.org Date: Mon, 12 May 2014 18:37:49 +0200 X-Original-Subject: Re: Guile language support in make Subject: Fix alignment and registers for m68k Fix bogus alignment assumptions (on some architectures, “natural” alignment is not used, which means even an uint64_t is possibly unaligned, or aligned to only a 2 byte (m68k) or 4 byte boundary). Also, fix register name for m68k. -- Thorsten Glaser writes: > and the guile-2.0 Build-Depends on m68k because guile does not > work there (and nobody appears capable enough to debug it)? --- a/libguile/gsubr.c +++ b/libguile/gsubr.c @@ -213,7 +213,7 @@ */ static const struct { - scm_t_uint64 dummy; /* ensure 8-byte alignment; perhaps there's a better way */ + scm_t_uint64 dummy SCM_ALIGNED (sizeof (scm_t_uint64)); /* ensure 8-byte alignment; perhaps there's a better way */ const scm_t_uint8 bytes[121 * (sizeof (struct scm_objcode) + 16 + sizeof (struct scm_objcode) + 32)]; } raw_bytecode = { @@ -317,7 +317,7 @@ static const struct static const struct { - scm_t_uint64 dummy; /* alignment */ + scm_t_uint64 dummy SCM_ALIGNED (sizeof (scm_t_uint64)); /* alignment */ scm_t_cell cells[121 * 2]; /* 11*11 double cells */ } objcode_cells = { 0, --- a/libguile/vm-engine.h +++ b/libguile/vm-engine.h @@ -74,7 +74,7 @@ #define FP_REG asm("%r16") #endif #ifdef __mc68000__ -#define IP_REG asm("a5") +#define IP_REG asm("a3") #define SP_REG asm("a4") #define FP_REG #endif