I'm so sorry for the delayed reply. I did not see the email and I forgot about this issue until now, when I bumped into it again. To recreate this problem you could clone my repo https://github.com/FilMarini/FPGA_CDR_core and open a *.vhd file placed in src/hdl >From there * open the speedbar * select Speedbar > Displays > VHDL Directories >From there, with the pre-installed vhdl-mode you can not expand the files (by typying the '+' symbol at the beginning of every file name), while if you install vhdl-mode from source, the file expands as it is supposed to. I will attach a screenshot on how the expansion should look like with vhdl-mode Thank you, sorry again for the late reply. Filippo On Tue, Dec 8, 2020 at 7:11 PM Lars Ingebrigtsen wrote: > Lars Ingebrigtsen writes: > > > I don't know anything about VHDL, but I tried the recipe, and got a > > speedbar saying "vhdl directory" where I could select directories. > > > > Do you have a file structure that displays the problem? If so, could > > you tar it up and send it to the debbugs address? > > More information was requested, but no response was given within a > month, so I'm closing this bug report. If the problem still exists, > please respond to this email and we'll reopen the bug report. > > -- > (domestic pets only, the antidote for overdose, milk.) > bloggy blog: http://lars.ingebrigtsen.no >