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From: Eli Zaretskii <eliz@gnu.org>
To: Cyril Arnould <cyril.arnould@outlook.com>,
	Friedrich Beckmann <friedrich.beckmann@gmx.de>,
	Reto Zimmermann <reto@gnu.org>
Cc: 62508@debbugs.gnu.org
Subject: bug#62508: 28.2; vhdl-mode ModelSim compile warnings aren't highlighted
Date: Wed, 29 Mar 2023 14:04:41 +0300	[thread overview]
Message-ID: <83mt3v7r92.fsf@gnu.org> (raw)
In-Reply-To: <AS4PR10MB6110A382B849143D67885B84E3889@AS4PR10MB6110.EURPRD10.PROD.OUTLOOK.COM> (message from Cyril Arnould on Tue, 28 Mar 2023 19:43:40 +0000)

> From: Cyril Arnould <cyril.arnould@outlook.com>
> Date: Tue, 28 Mar 2023 19:43:40 +0000
> 
> This bug is twofold. On one hand, the current configuration of the
> ModelSim compiler is not able to parse and highlight the Warnings as
> warnings when using vhdl-compile, they are listed as errors. With GHDL
> on the other hand, the *compile* buffer differentiates between
> warnings and errors when highlighting. I can't reproduce this at home
> since I don't have a ModelSim license there, but you can see the effect
> in a screenshot from the bugfix that introduced this:
> 
> https://lists.gnu.org/archive/html/bug-gnu-emacs/2014-10/msg01377.html
> 
> I have tried looking into modifying the regexp but for the life of me I
> couldn't figure out how compile.el differentiates between warnings and
> errors.
> 
> Now the second problem is that I believe the way bug#5768 was fixed is
> actually not compatible with ModelSim, but with ModelSim-Intel (formerly
> Altera). As the link above shows, the warnings are formatted as follows:
> 
> ** Warning: [3] counter_rtl.vhd(18): (vcom-1246) Range 5 downto 6 is null.
> 
> My ModelSim actually formats its Warnings differently, for example:
> 
> ** Warning: (vcom-1246) counter_rtl.vhd(18): Range 5 downto 6 is null.
> 
> You can look into the ModelSim documentation under the "Message Format"
> Section. I am not 100% certain if the number in brackets could also
> appear in my Installation but possibly the number is just optional. The
> regexp could be modified to allow both, this would avoid introducing a
> separate Modelsim-Intel compiler.
> 
> I can verify any fixes at work.

As I'm not an expert on vhdl, I CC people who might help us with this
issue.

Thanks.





  reply	other threads:[~2023-03-29 11:04 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-28 19:43 bug#62508: 28.2; vhdl-mode ModelSim compile warnings aren't highlighted Cyril Arnould
2023-03-29 11:04 ` Eli Zaretskii [this message]
2023-03-30 12:55   ` Reto Zimmermann
2023-03-30 14:23     ` Cyril Arnould
2023-04-01 10:09       ` Eli Zaretskii
2023-04-01 12:01 ` Mattias Engdegård
2023-04-03  7:21   ` Cyril Arnould
2023-04-03 10:16     ` Reto Zimmermann
2023-04-03 11:06     ` Mattias Engdegård

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