Release schedule for 22.2

Release schedule for 22.2

[Chong Yidong]

If nothing goes wrong, I plan to roll the 22.2 tarball next Wednesday,
the 26th of March.  If you have any fixes that you would like to add
to the branch, please inform emacs-devel ASAP.

Thanks.

Re: Release schedule for 22.2

[Reiner Steib]

On Tue, Mar 18 2008, Chong Yidong wrote:

> If nothing goes wrong, I plan to roll the 22.2 tarball next Wednesday,
> the 26th of March.  

Not another pretest before?

> If you have any fixes that you would like to add to the branch,
> please inform emacs-devel ASAP.

Miles, could you sync these changes[1,2] from Gnus v5-10 to Emacs 22?
If you can't do it soon, please let me know (then I'll do it
manually).

FYI, we also want to release the standalone version Gnus 5.10.10 when
Emacs 22.2 is released.

Bye, Reiner.

[1]
,----[ gnus/lisp/ChangeLog ]
| 2008-03-14  Katsumi Yamaoka  <yamaoka@jpl.org>
| 
| 	* mail-source.el (mail-source-delete-old-incoming) Fix regexp to find
| 	Incoming* files.
| 
| 2008-03-12  Katsumi Yamaoka  <yamaoka@jpl.org>
| 
| 	* nntp.el (nntp-open-telnet-stream, nntp-open-via-rlogin-and-telnet)
| 	(nntp-open-via-telnet-and-telnet): Make sure the nntp port to specify
| 	is a string.
| 
| 2008-03-10  Glenn Morris  <rgm@gnu.org>
| 
| 	Merge from the Emacs trunk to enable it to work with XEmacs.
| 	* tls.el: Don't require rx when compiling.
| 	(tls-end-of-info): Rewrite without using rx.
| 	(open-tls-stream): Use with-current-buffer.
| 
| [...]
|
| 2008-03-08  Riccardo Murri  <riccardo.murri@gmail.com>
| 
| 	* net/tls.el: Require rx when compiling.
| 	(tls-end-of-info): New variable.
| 	(open-tls-stream): Keep reading input until `tls-end-of-info' is
| 	matched.  [Sync from EMACS_22_BASE.]
`----

[2]
,----[ gnus/texi/ChangeLog ]
| 2008-03-16  Reiner Steib  <Reiner.Steib@gmx.de>
| 
| 	* gnus.texi (Top): Add "Other related manuals" and version info in
| 	`iftex' output.
| 	(Formatting Fonts): Add index entries for gnus-mouse-face, gnus-face-0,
| 	gnus-balloon-face-0 and the corresponding format specifiers.
`----
-- 
       ,,,
      (o o)
---ooO-(_)-Ooo---  |  PGP key available  |  http://rsteib.home.pages.de/

Re: Release schedule for 22.2

[Chong Yidong]

Reiner Steib <reinersteib+gmane@imap.cc> writes:

> On Tue, Mar 18 2008, Chong Yidong wrote:
>
>> If nothing goes wrong, I plan to roll the 22.2 tarball next Wednesday,
>> the 26th of March.  
>
> Not another pretest before?

There haven't been enough changes since the last pretest to warrant
this.

Re: Release schedule for 22.2

[Glenn Morris]

Reiner Steib wrote:

> | 2008-03-10  Glenn Morris  <rgm@gnu.org>
> | 
> | 	Merge from the Emacs trunk to enable it to work with XEmacs.

So you want to merge the change I made in the trunk on 2007-11-04 into
the release branch a week before the release, for the sake of XEmacs.
I don't care; If I'd known at the time the release was 4 months away,
I might have done so then.

> | 2008-03-08  Riccardo Murri  <riccardo.murri@gmail.com>
> | 
> | 	* net/tls.el: Require rx when compiling.
> | 	(tls-end-of-info): New variable.
> | 	(open-tls-stream): Keep reading input until `tls-end-of-info' is
> | 	matched.  [Sync from EMACS_22_BASE.]

This bugfix has been in the branch since 2007-11-04, as the [] comment
implies.

Re: Release schedule for 22.2

[Dan Nicolaescu]

Chong Yidong <cyd@stupidchicken.com> writes:

  > If nothing goes wrong, I plan to roll the 22.2 tarball next Wednesday,
  > the 26th of March.  If you have any fixes that you would like to add
  > to the branch, please inform emacs-devel ASAP.

I received theses 2 patches for verilog-mode.el. Should they go in 22.2 ? 

From: "Wilson Snyder" <wsnyder@wsnyder.org>
Subject: Verilog-mode.el patch: Tooltips
CC: mac@brushroad.com


The below adds this.  I'll leave it to you as to which Emacs version should
include these changes.

Changelog:
2008-03-17  Wilson Snyder  <wsnyder@wsnyder.org>

	* progmodes/verilog-mode.el (verilog-easy-menu-filter):
	Add menu tool tip :helps and filter appropriately.

	* verilog-mode.el (verilog-customize) (verilog-font-customize)
	(electric-verilog-backward-sexp) (electric-verilog-forward-sexp)
	(verilog-mode):  Update documentation strings to match tool tips.


Index: lisp/progmodes/verilog-mode.el
===================================================================
--- lisp/progmodes/verilog-mode.el	(revision 405)
+++ lisp/progmodes/verilog-mode.el	(revision 406)
@@ -257,13 +257,35 @@
     "Call 'regexp-opt' with word delimiters for the words A."
     (concat "\\<" (verilog-regexp-opt a t) "\\>")))
 
+(defun verilog-easy-menu-filter (menu)
+  "Filter a easy-menu-define to support new features."
+  (cond ((not (eval-and-compile (featurep 'xemacs)))
+	 menu) ;; GNU Emacs - passthru
+	;; Xemacs doesn't support :help.  Strip it.
+	;; Recursively filter the a submenu
+	((listp menu)
+	 (mapcar 'verilog-easy-menu-filter menu))
+	;; Look for [:help "blah"] and remove
+	((vectorp menu)
+	 (let ((i 0) (out []))
+	   (while (< i (length menu))
+	     (if (equal `:help (aref menu i))
+		 (setq i (+ 2 i))
+	       (setq out (vconcat out (vector (aref menu i)))
+		     i (1+ i))))
+	   out))
+	(t menu))) ;; Default - ok
+;;(verilog-easy-menu-filter
+;;  `("Verilog" ("MA" ["SAA" nil :help "Help SAA"] ["SAB" nil :help "Help SAA"])
+;;     "----" ["MB" nil :help "Help MB"]))
+
 (defun verilog-customize ()
-  "Link to customize screen for Verilog."
+  "Customize variables and other settings used by Verilog-Mode."
   (interactive)
   (customize-group 'verilog-mode))
 
 (defun verilog-font-customize ()
-  "Link to customize fonts used for Verilog."
+  "Customize fonts used by Verilog-Mode."
   (interactive)
   (if (fboundp 'customize-apropos)
       (customize-apropos "font-lock-*" 'faces)))
@@ -962,137 +984,221 @@
 ;; menus
 (easy-menu-define
   verilog-menu verilog-mode-map "Menu for Verilog mode"
-  `("Verilog"
-    ("Choose Compilation Action"
-     ["None"
-      (progn
-	(setq verilog-tool nil)
-	(verilog-set-compile-command))
-      :style radio
-      :selected (equal verilog-tool nil)]
-     ["Lint"
-      (progn
-	(setq verilog-tool 'verilog-linter)
-	(verilog-set-compile-command))
-      :style radio
-      :selected (equal verilog-tool `verilog-linter)]
-     ["Coverage"
-      (progn
-	(setq verilog-tool 'verilog-coverage)
-	(verilog-set-compile-command))
-      :style radio
-      :selected (equal verilog-tool `verilog-coverage)]
-     ["Simulator"
-      (progn
-	(setq verilog-tool 'verilog-simulator)
-	(verilog-set-compile-command))
-      :style radio
-      :selected (equal verilog-tool `verilog-simulator)]
-     ["Compiler"
-      (progn
-	(setq verilog-tool 'verilog-compiler)
-	(verilog-set-compile-command))
-      :style radio
-      :selected (equal verilog-tool `verilog-compiler)]
-     )
-    ("Move"
-     ["Beginning of function"           verilog-beg-of-defun
-      :keys "C-M-a"]
-     ["End of function"                 verilog-end-of-defun
-      :keys "C-M-e"]
-     ["Mark function"                   verilog-mark-defun
-      :keys "C-M-h"]
-     ["Goto function/module"		verilog-goto-defun t]
-     ["Move to beginning of block"	electric-verilog-backward-sexp t]
-     ["Move to end of block"		electric-verilog-forward-sexp t]
-     )
-    ("Comments"
-     ["Comment Region"			verilog-comment-region t]
-     ["UnComment Region"			verilog-uncomment-region t]
-     ["Multi-line comment insert"	verilog-star-comment t]
-     ["Lint error to comment"		verilog-lint-off t]
-     )
-    "----"
-    ["Compile"				compile t]
-    ["AUTO, Save, Compile"		verilog-auto-save-compile t]
-    ["Next Compile Error"		next-error t]
-    ["Ignore Lint Warning at point"	verilog-lint-off t]
-    "----"
-    ["Line up declarations around point"	verilog-pretty-declarations t]
-    ["Line up equations around point"		verilog-pretty-expr t]
-    ["Redo/insert comments on every end"	verilog-label-be t]
-    ["Expand [x:y] vector line"		verilog-expand-vector t]
-    ["Insert begin-end block"		verilog-insert-block t]
-    ["Complete word"			verilog-complete-word t]
-    "----"
-    ["Recompute AUTOs"			verilog-auto t]
-    ["Kill AUTOs"			verilog-delete-auto t]
-    ["Inject AUTOs"			verilog-inject-auto t]
-    ("AUTO Help..."
-     ["AUTO General"			(describe-function 'verilog-auto) t]
-     ["AUTO Library Flags"		(describe-variable 'verilog-library-flags) t]
-     ["AUTO Library Path"		(describe-variable 'verilog-library-directories) t]
-     ["AUTO Library Files"		(describe-variable 'verilog-library-files) t]
-     ["AUTO Library Extensions"		(describe-variable 'verilog-library-extensions) t]
-     ["AUTO `define Reading"		(describe-function 'verilog-read-defines) t]
-     ["AUTO `include Reading"		(describe-function 'verilog-read-includes) t]
-     ["AUTOARG"				(describe-function 'verilog-auto-arg) t]
-     ["AUTOASCIIENUM"			(describe-function 'verilog-auto-ascii-enum) t]
-     ["AUTOINOUTMODULE"			(describe-function 'verilog-auto-inout-module) t]
-     ["AUTOINOUT"			(describe-function 'verilog-auto-inout) t]
-     ["AUTOINPUT"			(describe-function 'verilog-auto-input) t]
-     ["AUTOINST"			(describe-function 'verilog-auto-inst) t]
-     ["AUTOINST (.*)"			(describe-function 'verilog-auto-star) t]
-     ["AUTOINSTPARAM"			(describe-function 'verilog-auto-inst-param) t]
-     ["AUTOOUTPUT"			(describe-function 'verilog-auto-output) t]
-     ["AUTOOUTPUTEVERY"			(describe-function 'verilog-auto-output-every) t]
-     ["AUTOREG"				(describe-function 'verilog-auto-reg) t]
-     ["AUTOREGINPUT"			(describe-function 'verilog-auto-reg-input) t]
-     ["AUTORESET"			(describe-function 'verilog-auto-reset) t]
-     ["AUTOSENSE"			(describe-function 'verilog-auto-sense) t]
-     ["AUTOTIEOFF"			(describe-function 'verilog-auto-tieoff) t]
-     ["AUTOUNUSED"			(describe-function 'verilog-auto-unused) t]
-     ["AUTOWIRE"			(describe-function 'verilog-auto-wire) t]
-     )
-    "----"
-    ["Submit bug report"		verilog-submit-bug-report t]
-    ["Version and FAQ"			verilog-faq t]
-    ["Customize Verilog Mode..."	verilog-customize t]
-    ["Customize Verilog Fonts & Colors"	verilog-font-customize t]))
+  (verilog-easy-menu-filter
+   `("Verilog"
+     ("Choose Compilation Action"
+      ["None"
+       (progn
+	 (setq verilog-tool nil)
+	 (verilog-set-compile-command))
+       :style radio
+       :selected (equal verilog-tool nil)
+       :help "When invoking compilation, use compile-command"]
+      ["Lint"
+       (progn
+	 (setq verilog-tool 'verilog-linter)
+	 (verilog-set-compile-command))
+       :style radio
+       :selected (equal verilog-tool `verilog-linter)
+       :help "When invoking compilation, use lint checker"]
+      ["Coverage"
+       (progn
+	 (setq verilog-tool 'verilog-coverage)
+	 (verilog-set-compile-command))
+       :style radio
+       :selected (equal verilog-tool `verilog-coverage)
+       :help "When invoking compilation, annotate for coverage"]
+      ["Simulator"
+       (progn
+	 (setq verilog-tool 'verilog-simulator)
+	 (verilog-set-compile-command))
+       :style radio
+       :selected (equal verilog-tool `verilog-simulator)
+       :help "When invoking compilation, interpret Verilog source"]
+      ["Compiler"
+       (progn
+	 (setq verilog-tool 'verilog-compiler)
+	 (verilog-set-compile-command))
+       :style radio
+       :selected (equal verilog-tool `verilog-compiler)
+       :help "When invoking compilation, compile Verilog source"]
+      )
+     ("Move"
+      ["Beginning of function"		verilog-beg-of-defun
+       :keys "C-M-a"
+       :help		"Move backward to the beginning of the current function or procedure"]
+      ["End of function"		verilog-end-of-defun
+       :keys "C-M-e"
+       :help		"Move forward to the end of the current function or procedure"]
+      ["Mark function"			verilog-mark-defun
+       :keys "C-M-h"
+       :help		"Mark the current Verilog function or procedure"]
+      ["Goto function/module"		verilog-goto-defun
+       :help		"Move to specified Verilog module/task/function"]
+      ["Move to beginning of block"	electric-verilog-backward-sexp
+       :help		"Move backward over one balanced expression"]
+      ["Move to end of block"		electric-verilog-forward-sexp
+       :help		"Move forward over one balanced expression"]
+      )
+     ("Comments"
+      ["Comment Region"			verilog-comment-region
+       :help		"Put marked area into a comment"]
+      ["UnComment Region"		verilog-uncomment-region
+       :help		"Uncomment an area commented with Comment Region"]
+      ["Multi-line comment insert"	verilog-star-comment
+       :help		"Insert Verilog /* */ comment at point"]
+      ["Lint error to comment"		verilog-lint-off
+       :help		"Convert a Verilog linter warning line into a disable statement"]
+      )
+     "----"
+     ["Compile"				compile
+      :help		"Perform compilation-action (above) on the current buffer"]
+     ["AUTO, Save, Compile"		verilog-auto-save-compile
+      :help		"Recompute AUTOs, save buffer, and compile"]
+     ["Next Compile Error"		next-error
+      :help		"Visit next compilation error message and corresponding source code"]
+     ["Ignore Lint Warning at point"	verilog-lint-off
+      :help		"Convert a Verilog linter warning line into a disable statement"]
+     "----"
+     ["Line up declarations around point"	verilog-pretty-declarations
+      :help		"Line up declarations around point"]
+     ["Line up equations around point"		verilog-pretty-expr
+      :help		"Line up expressions around point"]
+     ["Redo/insert comments on every end"	verilog-label-be
+      :help		"Label matching begin ... end statements"]
+     ["Expand [x:y] vector line"	verilog-expand-vector
+      :help		"Take a signal vector on the current line and expand it to multiple lines"]
+     ["Insert begin-end block"		verilog-insert-block
+      :help		"Insert begin ... end"]
+     ["Complete word"			verilog-complete-word
+      :help		"Complete word at point"]
+     "----"
+     ["Recompute AUTOs"			verilog-auto
+      :help		"Expand AUTO meta-comment statements"]
+     ["Kill AUTOs"			verilog-delete-auto
+      :help		"Remove AUTO expansions"]
+     ["Inject AUTOs"			verilog-inject-auto
+      :help		"Inject AUTOs into legacy non-AUTO buffer"]
+     ("AUTO Help..."
+      ["AUTO General"			(describe-function 'verilog-auto)
+       :help		"Help introduction on AUTOs"]
+      ["AUTO Library Flags"		(describe-variable 'verilog-library-flags)
+       :help		"Help on verilog-library-flags"]
+      ["AUTO Library Path"		(describe-variable 'verilog-library-directories)
+       :help		"Help on verilog-library-directories"]
+      ["AUTO Library Files"		(describe-variable 'verilog-library-files)
+       :help		"Help on verilog-library-files"]
+      ["AUTO Library Extensions"	(describe-variable 'verilog-library-extensions)
+       :help		"Help on verilog-library-extensions"]
+      ["AUTO `define Reading"		(describe-function 'verilog-read-defines)
+       :help		"Help on reading `defines"]
+      ["AUTO `include Reading"		(describe-function 'verilog-read-includes)
+       :help		"Help on parsing `includes"]
+      ["AUTOARG"			(describe-function 'verilog-auto-arg)
+       :help		"Help on AUTOARG - declaring module port list"]
+      ["AUTOASCIIENUM"			(describe-function 'verilog-auto-ascii-enum)
+       :help		"Help on AUTOASCIIENUM - creating ASCII for enumerations"]
+      ["AUTOINOUTMODULE"		(describe-function 'verilog-auto-inout-module)
+       :help		"Help on AUTOINOUTMODULE - copying i/o from another file"]
+      ["AUTOINOUT"			(describe-function 'verilog-auto-inout)
+       :help		"Help on AUTOINOUT - adding inouts from cells"]
+      ["AUTOINPUT"			(describe-function 'verilog-auto-input)
+       :help		"Help on AUTOINPUT - adding inputs from cells"]
+      ["AUTOINST"			(describe-function 'verilog-auto-inst)
+       :help		"Help on AUTOINST - adding pins for cells"]
+      ["AUTOINST (.*)"			(describe-function 'verilog-auto-star)
+       :help		"Help on expanding Verilog-2001 .* pins"]
+      ["AUTOINSTPARAM"			(describe-function 'verilog-auto-inst-param)
+       :help		"Help on AUTOINSTPARAM - adding parameter pins to cells"]
+      ["AUTOOUTPUT"			(describe-function 'verilog-auto-output)
+       :help		"Help on AUTOOUTPUT - adding outputs from cells"]
+      ["AUTOOUTPUTEVERY"		(describe-function 'verilog-auto-output-every)
+       :help		"Help on AUTOOUTPUTEVERY - adding outputs of all signals"]
+      ["AUTOREG"			(describe-function 'verilog-auto-reg)
+       :help		"Help on AUTOREG - declaring registers for non-wires"]
+      ["AUTOREGINPUT"			(describe-function 'verilog-auto-reg-input)
+       :help		"Help on AUTOREGINPUT - declaring inputs for non-wires"]
+      ["AUTORESET"			(describe-function 'verilog-auto-reset)
+       :help		"Help on AUTORESET - resetting always blocks"]
+      ["AUTOSENSE"			(describe-function 'verilog-auto-sense)
+       :help		"Help on AUTOSENSE - sensitivity lists for always blocks"]
+      ["AUTOTIEOFF"			(describe-function 'verilog-auto-tieoff)
+       :help		"Help on AUTOTIEOFF - tieing off unused outputs"]
+      ["AUTOUNUSED"			(describe-function 'verilog-auto-unused)
+       :help		"Help on AUTOUNUSED - terminating unused inputs"]
+      ["AUTOWIRE"			(describe-function 'verilog-auto-wire)
+       :help		"Help on AUTOWIRE - declaring wires for cells"]
+      )
+     "----"
+     ["Submit bug report"		verilog-submit-bug-report
+      :help		"Submit via mail a bug report on verilog-mode.el"]
+     ["Version and FAQ"			verilog-faq
+      :help		"Show the current version, and where to get the FAQ etc"]
+     ["Customize Verilog Mode..."	verilog-customize
+      :help		"Customize variables and other settings used by Verilog-Mode"]
+     ["Customize Verilog Fonts & Colors"	verilog-font-customize
+      :help		"Customize fonts used by Verilog-Mode."])))
 
 (easy-menu-define
   verilog-stmt-menu verilog-mode-map "Menu for statement templates in Verilog."
-  '("Statements"
-    ["Header"		verilog-sk-header  t]
-    ["Comment"		verilog-sk-comment t]
-    "----"
-    ["Module"		verilog-sk-module t]
-    ["Primitive"	verilog-sk-primitive t]
-    "----"
-    ["Input"		verilog-sk-input t]
-    ["Output"		verilog-sk-output t]
-    ["Inout"		verilog-sk-inout t]
-    ["Wire"		verilog-sk-wire t]
-    ["Reg"		verilog-sk-reg t]
-    ["Define thing under point as a register" verilog-sk-define-signal t]
-    "----"
-    ["Initial"		verilog-sk-initial t]
-    ["Always"		verilog-sk-always t]
-    ["Function"		verilog-sk-function t]
-    ["Task"		verilog-sk-task t]
-    ["Specify"		verilog-sk-specify t]
-    ["Generate"		verilog-sk-generate t]
-    "----"
-    ["Begin"		verilog-sk-begin t]
-    ["If"		verilog-sk-if t]
-    ["(if) else"	verilog-sk-else-if t]
-    ["For"		verilog-sk-for t]
-    ["While"		verilog-sk-while t]
-    ["Fork"		verilog-sk-fork t]
-    ["Repeat"		verilog-sk-repeat t]
-    ["Case"		verilog-sk-case t]
-    ["Casex"		verilog-sk-casex t]
-    ["Casez"		verilog-sk-casez t]))
+  (verilog-easy-menu-filter
+   '("Statements"
+     ["Header"		verilog-sk-header
+      :help		"Insert a header block at the top of file"]
+     ["Comment"		verilog-sk-comment
+      :help		"Insert a comment block"]
+     "----"
+     ["Module"		verilog-sk-module
+      :help		"Insert a module .. (/*AUTOARG*/);.. endmodule block"]
+     ["Primitive"	verilog-sk-primitive
+      :help		"Insert a primitive .. (.. );.. endprimitive block"]
+     "----"
+     ["Input"		verilog-sk-input
+      :help		"Insert an input declaration"]
+     ["Output"		verilog-sk-output
+      :help		"Insert an output declaration"]
+     ["Inout"		verilog-sk-inout
+      :help		"Insert an inout declaration"]
+     ["Wire"		verilog-sk-wire
+      :help		"Insert a wire declaration"]
+     ["Reg"		verilog-sk-reg
+      :help		"Insert a register declaration"]
+     ["Define thing under point as a register" verilog-sk-define-signal
+      :help		"Define signal under point as a register at the top of the module"]
+     "----"
+     ["Initial"		verilog-sk-initial
+      :help		"Insert an initial begin .. end block"]
+     ["Always"		verilog-sk-always
+      :help		"Insert an always @(AS) begin .. end block"]
+     ["Function"	verilog-sk-function
+      :help		"Insert a function .. begin .. end endfunction block"]
+     ["Task"		verilog-sk-task
+      :help		"Insert a task .. begin .. end endtask block"]
+     ["Specify"		verilog-sk-specify
+      :help		"Insert a specify .. endspecify block"]
+     ["Generate"	verilog-sk-generate
+      :help		"Insert a generate .. endgenerate block"]
+     "----"
+     ["Begin"		verilog-sk-begin
+      :help		"Insert a begin .. end block"]
+     ["If"		verilog-sk-if
+      :help		"Insert an if (..) begin .. end block"]
+     ["(if) else"	verilog-sk-else-if
+      :help		"Insert an else if (..) begin .. end block"]
+     ["For"		verilog-sk-for
+      :help		"Insert a for (...) begin .. end block"]
+     ["While"		verilog-sk-while
+      :help		"Insert a while (...) begin .. end block"]
+     ["Fork"		verilog-sk-fork
+      :help		"Insert a fork begin .. end .. join block"]
+     ["Repeat"		verilog-sk-repeat
+      :help		"Insert a repeat (..) begin .. end block"]
+     ["Case"		verilog-sk-case
+      :help		"Insert a case block, prompting for details"]
+     ["Casex"		verilog-sk-casex
+      :help		"Insert a casex (...) item: begin.. end endcase block"]
+     ["Casez"		verilog-sk-casez
+      :help		"Insert a casez (...) item: begin.. end endcase block"])))
 
 (defvar verilog-mode-abbrev-table nil
   "Abbrev table in use in Verilog-mode buffers.")
@@ -2004,13 +2110,13 @@
 	  ":" (int-to-string (count-lines (point-min) (or pointnum (point))))))
 
 (defun electric-verilog-backward-sexp ()
-  "Move backward over a sexp."
+  "Move backward over one balanced expression."
   (interactive)
   ;; before that see if we are in a comment
   (verilog-backward-sexp))
 
 (defun electric-verilog-forward-sexp ()
-  "Move forward over a sexp."
+  "Move forward over one balanced expression."
   (interactive)
   ;; before that see if we are in a comment
   (verilog-forward-sexp))
@@ -2308,15 +2414,15 @@
 
     \\[verilog-comment-region]  Put marked area in a comment.
     \\[verilog-uncomment-region]  Uncomment an area commented with \\[verilog-comment-region].
-    \\[verilog-insert-block]  Insert begin ... end;.
+    \\[verilog-insert-block]  Insert begin ... end.
     \\[verilog-star-comment]    Insert /* ... */.
 
-    \\[verilog-sk-always]  Insert a always @(AS) begin .. end block.
+    \\[verilog-sk-always]  Insert an always @(AS) begin .. end block.
     \\[verilog-sk-begin]  Insert a begin .. end block.
     \\[verilog-sk-case]  Insert a case block, prompting for details.
     \\[verilog-sk-for]  Insert a for (...) begin .. end block, prompting for details.
     \\[verilog-sk-generate]  Insert a generate .. endgenerate block.
-    \\[verilog-sk-header]  Insert a nice header block at the top of file.
+    \\[verilog-sk-header]  Insert a header block at the top of file.
     \\[verilog-sk-initial]  Insert an initial begin .. end block.
     \\[verilog-sk-fork]  Insert a fork begin .. end .. join block.
     \\[verilog-sk-module]  Insert a module .. (/*AUTOARG*/);.. endmodule block.


From: "Wilson Snyder" <wsnyder@wsnyder.org>
Subject: Verilog-mode.el patch: .* in quotes
CC: mac@brushroad.com


Here's another bug fix.

-Wilson

Changelog:
2008-03-17  Wilson Snyder  <wsnyder@wsnyder.org>

	* progmodes/verilog-mode.el (verilog-auto-search-do)
	(verilog-auto-re-search-do) (verilog-skip-forward-comment-or-string):
	Fix verilog-auto expansion when a .* appears inside a string.

	* progmodes/verilog-mode.el (verilog-re-search-forward)
	(verilog-re-search-backward): Add comment to recall how this works.

Index: progmodes/verilog-mode.el
===================================================================
--- progmodes/verilog-mode.el	(revision 406)
+++ progmodes/verilog-mode.el	(working copy)
@@ -1231,7 +1231,7 @@
 (defsubst verilog-re-search-forward (REGEXP BOUND NOERROR)
   ; checkdoc-params: (REGEXP BOUND NOERROR)
   "Like `re-search-forward', but skips over match in comments or strings."
-  (store-match-data '(nil nil))
+  (store-match-data '(nil nil))  ;; So match-end will return nil if no matches found
   (while (and
 	  (re-search-forward REGEXP BOUND NOERROR)
 	  (and (verilog-skip-forward-comment-or-string)
@@ -1245,7 +1245,7 @@
 (defsubst verilog-re-search-backward (REGEXP BOUND NOERROR)
   ; checkdoc-params: (REGEXP BOUND NOERROR)
   "Like `re-search-backward', but skips over match in comments or strings."
-  (store-match-data '(nil nil))
+  (store-match-data '(nil nil))  ;; So match-end will return nil if no matches found
   (while (and
 	  (re-search-backward REGEXP BOUND NOERROR)
 	  (and (verilog-skip-backward-comment-or-string)
@@ -4530,7 +4530,7 @@
 	  (parse-partial-sexp (point-min) (point)))))
    (cond
     ((nth 3 state)			;Inside string
-     (goto-char (nth 3 state))
+     (search-forward "\"")
      t)
     ((nth 7 state)			;Inside // comment
      (forward-line 1)
@@ -6386,7 +6386,7 @@
 	  ;; below 3 modified by verilog-read-sub-decls-line
 	  sigs-out sigs-inout sigs-in)
       (verilog-beg-of-defun)
-      (while (re-search-forward "\\(/\\*AUTOINST\\*/\\|\\.\\*\\)" end-mod-point t)
+      (while (verilog-re-search-forward "\\(/\\*AUTOINST\\*/\\|\\.\\*\\)" end-mod-point t)
 	(save-excursion
 	  (goto-char (match-beginning 0))
 	  (unless (verilog-inside-comment-p)
@@ -7406,20 +7406,14 @@
 (defun verilog-auto-search-do (search-for func)
   "Search for the given auto text SEARCH-FOR, and perform FUNC where it occurs."
   (goto-char (point-min))
-  (while (search-forward search-for nil t)
-    (if (not (save-excursion
-	       (goto-char (match-beginning 0))
-	       (verilog-inside-comment-p)))
-	(funcall func))))
+  (while (verilog-re-search-forward (regexp-quote search-for) nil t)
+    (funcall func)))
 
 (defun verilog-auto-re-search-do (search-for func)
   "Search for the given auto text SEARCH-FOR, and perform FUNC where it occurs."
   (goto-char (point-min))
-  (while (re-search-forward search-for nil t)
-    (if (not (save-excursion
-	       (goto-char (match-beginning 0))
-	       (verilog-inside-comment-p)))
-	(funcall func))))
+  (while (verilog-re-search-forward search-for nil t)
+    (funcall func)))
 
 (defun verilog-insert-one-definition (sig type indent-pt)
   "Print out a definition for SIG of the given TYPE,

Re: Release schedule for 22.2

[Reiner Steib]

On Wed, Mar 19 2008, Glenn Morris wrote:

> Reiner Steib wrote:
>
>> | 2008-03-10  Glenn Morris  <rgm@gnu.org>
>> | 	Merge from the Emacs trunk to enable it to work with XEmacs.
>
> So you want to merge the change I made in the trunk on 2007-11-04 

I.e. it has been tested in practice for 4 months.

> into the release branch a week before the release, for the sake of
> XEmacs.

My primary goal is to have the same Gnus code base in Gnus 5.10.10 and
Emacs 22.2.  Every excluded change makes maintenance a little bit
harder.

> I don't care; If I'd known at the time the release was 4 months
> away, I might have done so then.

I consider _this_ change reasonably safe as it (as you know) simply
converts the rx regexp to a plain concatted regexp in the defcustom.
Last time we discussed this change, I checked that both regexp give
the same result (modulo some shy groups).  Additionally, it has been
tested in the trunk since 2007-11-04.

Oh, I see that a couple of hours after this mail, you committed this
change to EMACS_22_BASE.  So I guess we don't need to discuss this
further.

>> | 2008-03-08  Riccardo Murri  <riccardo.murri@gmail.com>
[...]
>> | 	matched.  [Sync from EMACS_22_BASE.]
>
> This bugfix has been in the branch since 2007-11-04, as the [] comment
> implies.

Yes, sorry.  (I only compared the top of the ChangeLogs quickly.)

Bye, Reiner.
-- 
       ,,,
      (o o)
---ooO-(_)-Ooo---  |  PGP key available  |  http://rsteib.home.pages.de/

(eval-and-compile (featurep 'xemacs))? (was: Release schedule for 22.2)

[Reiner Steib]

On Wed, Mar 19 2008, Dan Nicolaescu wrote:

> 2008-03-17  Wilson Snyder  <wsnyder@wsnyder.org>
[...]
> +(defun verilog-easy-menu-filter (menu)
> +  "Filter a easy-menu-define to support new features."
> +  (cond ((not (eval-and-compile (featurep 'xemacs)))
> +	 menu) ;; GNU Emacs - passthru

Just curious: Why `eval-and-compile' here?

Bye, Reiner.
-- 
       ,,,
      (o o)
---ooO-(_)-Ooo---  |  PGP key available  |  http://rsteib.home.pages.de/

Re: Release schedule for 22.2

[Reiner Steib]

On Wed, Mar 19 2008, Chong Yidong wrote:

> Reiner Steib <reinersteib+gmane@imap.cc> writes:
>> Not another pretest before?
>
> There haven't been enough changes since the last pretest to warrant
> this.

[Well, we have...

  $ cvs diff -u -r EMACS_PRETEST_22_1_92 */ChangeLog lisp/*/ChangeLog | \
      grep '^\+' | wc -l
  144

..., including changes in C and Lisp code.]


As you didn't comment on the Gnus changes: Does that mean that you
agree to sync the v5-10 changes to EMACS_22_BASE now?

[Quoting added:]
>> Miles, could you sync these changes[1,2] from Gnus v5-10 to Emacs 22?
>> If you can't do it soon, please let me know (then I'll do it
>> manually).

I'll do this later today unless I hear from Miles.

Bye, Reiner.
-- 
       ,,,
      (o o)
---ooO-(_)-Ooo---  |  PGP key available  |  http://rsteib.home.pages.de/

Re: Release schedule for 22.2

[Stefan Monnier]

> I received theses 2 patches for verilog-mode.el. Should they go in 22.2 ? 

> 2008-03-17  Wilson Snyder  <wsnyder@wsnyder.org>

> 	* progmodes/verilog-mode.el (verilog-easy-menu-filter):
> 	Add menu tool tip :helps and filter appropriately.

> 	* verilog-mode.el (verilog-customize) (verilog-font-customize)
> 	(electric-verilog-backward-sexp) (electric-verilog-forward-sexp)
> 	(verilog-mode):  Update documentation strings to match tool tips.

For this patch, I suggest you make a special version for 22.2 which
only adds the :help entries and updates the dosctrings.  The filter
function is only needed for XEmacs anyway, so it's OK to skip it there
(but please install the full patch on the trunk, of course).

> 2008-03-17  Wilson Snyder  <wsnyder@wsnyder.org>

> 	* progmodes/verilog-mode.el (verilog-auto-search-do)
> 	(verilog-auto-re-search-do) (verilog-skip-forward-comment-or-string):
> 	Fix verilog-auto expansion when a .* appears inside a string.

> 	* progmodes/verilog-mode.el (verilog-re-search-forward)
> 	(verilog-re-search-backward): Add comment to recall how this works.

Please ask him how much this was tested before installing it,
And please rewrite verilog-auto-search-do so it calls
verilog-auto-re-search-do, to remove this silly duplication.


        Stefan

Re: Release schedule for 22.2

[Chong Yidong]

Reiner Steib <reinersteib+gmane@imap.cc> writes:

>> There haven't been enough changes since the last pretest to warrant
>> this.
>
> [Well, we have...
>
>   $ cvs diff -u -r EMACS_PRETEST_22_1_92 */ChangeLog lisp/*/ChangeLog | \
>       grep '^\+' | wc -l
>   144
>
> ..., including changes in C and Lisp code.]
>
> As you didn't comment on the Gnus changes: Does that mean that you
> agree to sync the v5-10 changes to EMACS_22_BASE now?

I'll take your word that it's stable enough to merge in.

Re: Release schedule for 22.2

[Chong Yidong]

Dan Nicolaescu <dann@ics.uci.edu> writes:

> Chong Yidong <cyd@stupidchicken.com> writes:
>
>   > If nothing goes wrong, I plan to roll the 22.2 tarball next Wednesday,
>   > the 26th of March.  If you have any fixes that you would like to add
>   > to the branch, please inform emacs-devel ASAP.
>
> I received theses 2 patches for verilog-mode.el. Should they go in 22.2 ? 
>
> 2008-03-17  Wilson Snyder  <wsnyder@wsnyder.org>
>
> 	* progmodes/verilog-mode.el (verilog-easy-menu-filter):
> 	Add menu tool tip :helps and filter appropriately.
>
> 	* verilog-mode.el (verilog-customize) (verilog-font-customize)
> 	(electric-verilog-backward-sexp) (electric-verilog-forward-sexp)
> 	(verilog-mode):  Update documentation strings to match tool tips.

These can wait till after the release.

Re: Release schedule for 22.2

[Dan Nicolaescu]

Chong Yidong <cyd@stupidchicken.com> writes:

  > Dan Nicolaescu <dann@ics.uci.edu> writes:
  > 
  > > Chong Yidong <cyd@stupidchicken.com> writes:
  > >
  > >   > If nothing goes wrong, I plan to roll the 22.2 tarball next Wednesday,
  > >   > the 26th of March.  If you have any fixes that you would like to add
  > >   > to the branch, please inform emacs-devel ASAP.
  > >
  > > I received theses 2 patches for verilog-mode.el. Should they go in 22.2 ? 
  > >
  > > 2008-03-17  Wilson Snyder  <wsnyder@wsnyder.org>
  > >
  > > 	* progmodes/verilog-mode.el (verilog-easy-menu-filter):
  > > 	Add menu tool tip :helps and filter appropriately.
  > >
  > > 	* verilog-mode.el (verilog-customize) (verilog-font-customize)
  > > 	(electric-verilog-backward-sexp) (electric-verilog-forward-sexp)
  > > 	(verilog-mode):  Update documentation strings to match tool tips.
  > 
  > These can wait till after the release.

Stefan OKed them a few days ago, so they are already checked in.  Should
I take them out?

Re: Release schedule for 22.2

[Chong Yidong]

Dan Nicolaescu <dann@ics.uci.edu> writes:

> Chong Yidong <cyd@stupidchicken.com> writes:
>
>   > Dan Nicolaescu <dann@ics.uci.edu> writes:
>   > 
>   > > Chong Yidong <cyd@stupidchicken.com> writes:
>   > >
>   > >   > If nothing goes wrong, I plan to roll the 22.2 tarball next Wednesday,
>   > >   > the 26th of March.  If you have any fixes that you would like to add
>   > >   > to the branch, please inform emacs-devel ASAP.
>   > >
>   > > I received theses 2 patches for verilog-mode.el. Should they go in 22.2 ? 
>   > >
>   > > 2008-03-17  Wilson Snyder  <wsnyder@wsnyder.org>
>   > >
>   > > 	* progmodes/verilog-mode.el (verilog-easy-menu-filter):
>   > > 	Add menu tool tip :helps and filter appropriately.
>   > >
>   > > 	* verilog-mode.el (verilog-customize) (verilog-font-customize)
>   > > 	(electric-verilog-backward-sexp) (electric-verilog-forward-sexp)
>   > > 	(verilog-mode):  Update documentation strings to match tool tips.
>   > 
>   > These can wait till after the release.
>
> Stefan OKed them a few days ago, so they are already checked in.  Should
> I take them out?

Nah, leave them in.  It's not important.

Re: Release schedule for 22.2

[Chong Yidong]

Chong Yidong <cyd@stupidchicken.com> writes:

> If nothing goes wrong, I plan to roll the 22.2 tarball next Wednesday,
> the 26th of March.  If you have any fixes that you would like to add
> to the branch, please inform emacs-devel ASAP.

Heads up: I'll be rolling the tarball in about 24 hours.